{"id":229290,"date":"2024-10-19T14:54:59","date_gmt":"2024-10-19T14:54:59","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-62680-1-22017-2\/"},"modified":"2024-10-25T09:03:05","modified_gmt":"2024-10-25T09:03:05","slug":"bs-en-62680-1-22017-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-62680-1-22017-2\/","title":{"rendered":"BS EN 62680-1-2:2017"},"content":{"rendered":"

IEC 62680-1-2:2017(E) defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies.  This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100 W. This specification is intended to be fully compatible and extend the existing USB infrastructure.  It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. USB Power Delivery is designed to operate independently of the existing USB bus defined mechanisms used to negotiate power which are: – [USB 2.0], [USB 3.1]in band requests for high power interfaces. – [USBBC 1.2]mechanisms for supplying higher power (not mandated by this specification). – [USB Type-C 1.2]mechanisms for supplying higher power<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
2<\/td>\nundefined <\/td>\n<\/tr>\n
5<\/td>\nFOREWORD <\/td>\n<\/tr>\n
7<\/td>\nINTRODUCTION <\/td>\n<\/tr>\n
18<\/td>\nCONTENTS <\/td>\n<\/tr>\n
37<\/td>\n1 Introduction
1.1 Overview <\/td>\n<\/tr>\n
38<\/td>\n1.2 Purpose
1.3 Scope
1.4 Conventions
1.4.1 Precedence
1.4.2 Keywords <\/td>\n<\/tr>\n
39<\/td>\n1.4.3 Numbering <\/td>\n<\/tr>\n
40<\/td>\n1.5 Related Documents
1.6 Terms and Abbreviations
Tables
Table 1-1 Terms and Abbreviations <\/td>\n<\/tr>\n
47<\/td>\n1.7 Parameter Values <\/td>\n<\/tr>\n
48<\/td>\n1.8 Changes From Revision 2.0
1.9 Compatibility with Revision 2.0
2 Overview
2.1 Introduction <\/td>\n<\/tr>\n
50<\/td>\n2.2 Section Overview <\/td>\n<\/tr>\n
51<\/td>\n2.3 Revision 2.0 Changes and Compatibility
2.3.1 Changes From Revision 2.0
2.3.2 Compatibility with Revision 2.0 <\/td>\n<\/tr>\n
52<\/td>\n2.4 USB Power Delivery Capable Devices
Figures
Figure 2-1 Logical Structure of USB Power Delivery Capable Devices <\/td>\n<\/tr>\n
53<\/td>\n2.5 SOP* Communication
2.5.1 Introduction
2.5.2 SOP* Collision Avoidance
2.5.3 SOP Communication
2.5.4 SOP\u2019\/SOP\u2019\u2019 Communication with Cable Plugs <\/td>\n<\/tr>\n
54<\/td>\nFigure 2-2 Example SOP\u2019 Communication between VCONN Source and Cable Plug(s) <\/td>\n<\/tr>\n
55<\/td>\n2.6 Operational Overview
2.6.1 Source Operation <\/td>\n<\/tr>\n
58<\/td>\n2.6.2 Sink Operation <\/td>\n<\/tr>\n
60<\/td>\n2.6.3 Cable Plugs <\/td>\n<\/tr>\n
61<\/td>\n2.7 Architectural Overview
Figure 2-3 USB Power Delivery Communications Stack <\/td>\n<\/tr>\n
62<\/td>\nFigure 2-4 USB Power Delivery Communication Over USB <\/td>\n<\/tr>\n
63<\/td>\n2.7.1 Policy
Figure 2-5 High Level Architecture View <\/td>\n<\/tr>\n
64<\/td>\n2.7.2 Message Formation and Transmission
2.7.3 Collision Avoidance <\/td>\n<\/tr>\n
65<\/td>\n2.7.4 Power supply
2.7.5 DFP\/UFP
2.7.6 Vconn Source
2.7.7 Cable and Connectors <\/td>\n<\/tr>\n
66<\/td>\n2.7.8 Interactions between Non-PD, BC and PD devices
2.7.9 Power Rules
3 USB Type-A and USB Type-B Cable Assemblies and Connectors
4 Electrical Requirements
4.1 Interoperability with other USB Specifications
4.2 Dead Battery Detection \/ Unpowered Port Detection
4.3 Cable IR Ground Drop (IR Drop) <\/td>\n<\/tr>\n
67<\/td>\n4.4 Cable Type Detection
5 Physical Layer
5.1 Physical Layer Overview
5.2 Physical Layer Functions <\/td>\n<\/tr>\n
68<\/td>\n5.3 Symbol Encoding
Table 5-1 4b5b Symbol Encoding Table <\/td>\n<\/tr>\n
69<\/td>\n5.4 Ordered Sets
Table 5-2 Ordered Sets
Table 5-3 Validation of Ordered Sets
Figure 5-1 Interpretation of ordered sets <\/td>\n<\/tr>\n
70<\/td>\n5.5 Transmitted Bit Ordering
Table 5-4 Data Size
Figure 5-2 Transmit Order for Various Sizes of Data <\/td>\n<\/tr>\n
71<\/td>\n5.6 Packet Format
5.6.1 Packet Framing
Table 5-5 SOP ordered set
Figure 5-3 USB Power Delivery Packet Format <\/td>\n<\/tr>\n
72<\/td>\nTable 5-6 SOP\u2019 ordered set
Table 5-7 SOP\u2019\u2019 ordered set <\/td>\n<\/tr>\n
73<\/td>\n5.6.2 CRC
Table 5-8 SOP\u2019_Debug ordered set
Table 5-9 SOP\u2019\u2019_Debug ordered set <\/td>\n<\/tr>\n
74<\/td>\nTable 5-10 CRC-32 Mapping
Figure 5-4 CRC 32 generation <\/td>\n<\/tr>\n
75<\/td>\n5.6.3 Packet Detection Errors
5.6.4 Hard Reset
Table 5-11 Hard Reset ordered set <\/td>\n<\/tr>\n
76<\/td>\n5.6.5 Cable Reset
5.7 Collision Avoidance
Table 5-12 Cable Reset ordered set
Figure 5-5 Line format of Hard Reset
Figure 5-6 Line format of Cable Reset <\/td>\n<\/tr>\n
77<\/td>\n5.8 Biphase Mark Coding (BMC) Signaling Scheme
5.8.1 Encoding and signaling
Table 5-13 Rp values used for Collision Avoidance
Figure 5-7 BMC Example <\/td>\n<\/tr>\n
78<\/td>\nFigure 5-8 BMC Transmitter Block Diagram
Figure 5-9 BMC Receiver Block Diagram <\/td>\n<\/tr>\n
79<\/td>\nFigure 5-10 BMC Encoded Start of Preamble
Figure 5-11 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with High-to-Low Last Transition
Figure 5-12 Transmitting or Receiving BMC Encoded Frame Terminated by One with High-to-Low Last Transition <\/td>\n<\/tr>\n
80<\/td>\n5.8.2 Transmit and Receive Masks
Figure 5-13 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with Low to High Last Transition
Figure 5-14 Transmitting or Receiving BMC Encoded Frame Terminated by One with Low to High Last Transition <\/td>\n<\/tr>\n
81<\/td>\nFigure 5-15 BMC Tx \u2018ONE\u2019 Mask
Figure 5-16 BMC Tx \u2018ZERO\u2019 Mask <\/td>\n<\/tr>\n
82<\/td>\nTable 5-14 BMC Tx Mask Definition, X Values
Table 5-15 BMC Tx Mask Definition, Y Values <\/td>\n<\/tr>\n
83<\/td>\nFigure 5-17 BMC Rx \u2018ONE\u2019 Mask when Sourcing Power <\/td>\n<\/tr>\n
84<\/td>\nFigure 5-18 BMC Rx \u2018ZERO\u2019 Mask when Sourcing Power
Figure 5-19 BMC Rx \u2018ONE\u2019 Mask when Power neutral <\/td>\n<\/tr>\n
85<\/td>\nFigure 5-20 BMC Rx \u2018ZERO\u2019 Mask when Power neutral
Figure 5-21 BMC Rx \u2018ONE\u2019 Mask when Sinking Power <\/td>\n<\/tr>\n
86<\/td>\n5.8.3 Transmitter Load Model
Table 5-16 BMC Rx Mask Definition
Figure 5-22 BMC Rx \u2018ZERO\u2019 Mask when Sinking Power <\/td>\n<\/tr>\n
87<\/td>\n5.8.4 BMC Common specifications
Figure 5-23 Transmitter Load Model for BMC Tx from a Source
Figure 5-24 Transmitter Load Model for BMC Tx from a Sink <\/td>\n<\/tr>\n
88<\/td>\n5.8.5 BMC Transmitter Specifications
Table 5-17 BMC Common Normative Requirements
Table 5-18 BMC Transmitter Normative Requirements <\/td>\n<\/tr>\n
89<\/td>\nFigure 5-25 Transmitter diagram illustrating zDriver <\/td>\n<\/tr>\n
90<\/td>\n5.8.6 BMC Receiver Specifications
Figure 5-26 Inter-Frame Gap Timings <\/td>\n<\/tr>\n
91<\/td>\nTable 5-19 BMC Receiver Normative Requirements <\/td>\n<\/tr>\n
92<\/td>\nFigure 5-27 Example Multi-Drop Configuration showing two DRPs
Figure 5-28 Example Multi-Drop Configuration showing a DFP and UFP <\/td>\n<\/tr>\n
94<\/td>\n5.9 Built in Self-Test (BIST)
5.9.1 BIST Carrier Mode
5.9.2 BIST Test Data
6 Protocol Layer
6.1 Overview
6.2 Messages
Figure 5-29 Test Data Frame <\/td>\n<\/tr>\n
95<\/td>\n6.2.1 Message Construction
Figure 6-1 USB Power Delivery Packet Format including Control Message Payload
Figure 6-2 USB Power Delivery Packet Format including Data Message Payload
Figure 6-3 USB Power Delivery Packet Format including an Extended Message Header and Payload <\/td>\n<\/tr>\n
96<\/td>\nTable 6-1 Message Header <\/td>\n<\/tr>\n
98<\/td>\nTable 6-2 Revision Interoperability during an Explicit Contract <\/td>\n<\/tr>\n
99<\/td>\nTable 6-3 Extended Message Header <\/td>\n<\/tr>\n
101<\/td>\nTable 6-4 Use of Unchunked Message Supported bit
Figure 6-4 Example Security_Request sequence Unchunked (Chunked bit = 0)
Figure 6-5 Example byte transmission for Security_Request Message of Data Size 7 (Chunked bit is set to 0) <\/td>\n<\/tr>\n
102<\/td>\nFigure 6-6 Example byte transmission for Security_Response Message of Data Size 7 (Chunked bit is set to 0) <\/td>\n<\/tr>\n
103<\/td>\nFigure 6-7 Example Security_Request sequence Chunked (Chunked bit = 1) <\/td>\n<\/tr>\n
104<\/td>\nFigure 6-8 Example Security_Request Message of Data Size 7 (Chunked bit set to 1)
Figure 6-9 Example Chunk 0 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Figure 6-10 Example byte transmission for a Security_Request Message Chunk request (Chunked bit is set to 1) <\/td>\n<\/tr>\n
105<\/td>\n6.3 Control Message
Table 6-5 Control Message Types
Figure 6-11 Example Chunk 1 of Security_Response Message of Data Size 30 (Chunked bit set to 1) <\/td>\n<\/tr>\n
106<\/td>\n6.3.1 GoodCRC Message
6.3.2 GotoMin Message
6.3.3 Accept Message <\/td>\n<\/tr>\n
107<\/td>\n6.3.4 Reject Message
6.3.5 Ping Message
6.3.6 PS_RDY Message
6.3.7 Get_Source_Cap Message
6.3.8 Get_Sink_Cap Message
6.3.9 DR_Swap Message <\/td>\n<\/tr>\n
108<\/td>\n6.3.10 PR_Swap Message <\/td>\n<\/tr>\n
109<\/td>\n6.3.11 VCONN_Swap Message
6.3.12 Wait Message <\/td>\n<\/tr>\n
110<\/td>\n6.3.13 Soft Reset Message <\/td>\n<\/tr>\n
111<\/td>\n6.3.14 Not_Supported Message
6.3.15 Get_Source_Cap_Extended Message
6.3.16 Get_Status Message
6.3.17 FR_Swap Message <\/td>\n<\/tr>\n
112<\/td>\n6.4 Data Message
6.4.1 Capabilities Message
Table 6-6 Data Message Types <\/td>\n<\/tr>\n
113<\/td>\nTable 6-7 Power Data Object
Figure 6-12 Example Capabilities Message with 2 Power Data Objects <\/td>\n<\/tr>\n
115<\/td>\nTable 6-8 Fixed Supply PDO – Source <\/td>\n<\/tr>\n
117<\/td>\nTable 6-9 Fixed Power Source Peak Current Capability
Table 6-10 Variable Supply (non-Battery) PDO – Source
Table 6-11 Battery Supply PDO – Source <\/td>\n<\/tr>\n
118<\/td>\nTable 6-12 Fixed Supply PDO – Sink <\/td>\n<\/tr>\n
119<\/td>\nTable 6-13 Variable Supply (non-Battery) PDO – Sink <\/td>\n<\/tr>\n
120<\/td>\n6.4.2 Request Message
Table 6-14 Battery Supply PDO – Sink
Table 6-15 Fixed and Variable Request Data Object
Table 6-16 Fixed and Variable Request Data Object with GiveBack Support <\/td>\n<\/tr>\n
121<\/td>\nTable 6-17 Battery Request Data Object
Table 6-18 Battery Request Data Object with GiveBack Support <\/td>\n<\/tr>\n
124<\/td>\n6.4.3 BIST Message
Table 6-19 BIST Data Object
Figure 6-13 BIST Message <\/td>\n<\/tr>\n
125<\/td>\n6.4.4 Vendor Defined Message
Figure 6-14 Vendor Defined Message <\/td>\n<\/tr>\n
126<\/td>\nTable 6-20 Unstructured VDM Header <\/td>\n<\/tr>\n
127<\/td>\nTable 6-21 Structured VDM Header
Table 6-22 Structured VDM Commands <\/td>\n<\/tr>\n
128<\/td>\nTable 6-23 SVID Values <\/td>\n<\/tr>\n
130<\/td>\nTable 6-24 Commands and Responses
Figure 6-15 Discover Identity Command response <\/td>\n<\/tr>\n
131<\/td>\nTable 6-25 ID Header VDO <\/td>\n<\/tr>\n
132<\/td>\nTable 6-26 Product Types (UFP)
Table 6-27 Product Types (Cable Plug)
Table 6-28 Product Types (DFP) <\/td>\n<\/tr>\n
133<\/td>\nTable 6-29 Cert Stat VDO
Table 6-30 Product VDO <\/td>\n<\/tr>\n
134<\/td>\nTable 6-31 Passive Cable VDO <\/td>\n<\/tr>\n
135<\/td>\nTable 6-32 Active Cable VDO <\/td>\n<\/tr>\n
137<\/td>\nTable 6-33 AMA VDO <\/td>\n<\/tr>\n
138<\/td>\nTable 6-34 Discover SVIDs Responder VDO
Figure 6-16 Example Discover SVIDs response with 3 SVIDs
Figure 6-17 Example Discover SVIDs response with 4 SVIDs
Figure 6-18 Example Discover SVIDs response with 12 SVIDs followed by an empty response <\/td>\n<\/tr>\n
139<\/td>\nFigure 6-19 Example Discover Modes response for a given SVID with 3 Modes <\/td>\n<\/tr>\n
140<\/td>\nFigure 6-20 Successful Enter Mode sequence <\/td>\n<\/tr>\n
141<\/td>\nFigure 6-21 Enter Mode sequence Interrupted by Source Capabilities and then Re-run
Figure 6-22 Unsuccessful Enter Mode sequence due to NAK <\/td>\n<\/tr>\n
142<\/td>\nFigure 6-23 Exit Mode sequence <\/td>\n<\/tr>\n
143<\/td>\nFigure 6-24 Attention Command request\/response sequence
Figure 6-25 Command request\/response sequence <\/td>\n<\/tr>\n
145<\/td>\nFigure 6-26 Enter\/Exit Mode Process <\/td>\n<\/tr>\n
146<\/td>\n6.4.5 Battery_Status Message
Table 6-35 Battery Status Data Object (BSDO)
Figure 6-27 Battery_Status Message <\/td>\n<\/tr>\n
147<\/td>\n6.4.6 Alert Message
Table 6-36 Alert Data Object
Figure 6-28 Alert Message <\/td>\n<\/tr>\n
148<\/td>\n6.5 Extended Message
Table 6-37 Extended Message Types <\/td>\n<\/tr>\n
149<\/td>\n6.5.1 Source_Capabilities_Extended Message
Table 6-38 Source Capabilities Extended Data Block (SCEDB)
Figure 6-29 Source_Capabilities_Extended Message <\/td>\n<\/tr>\n
153<\/td>\n6.5.2 Status Message
Table 6-39 Status Data Block (SSDB)
Figure 6-30 Status Message <\/td>\n<\/tr>\n
154<\/td>\n6.5.3 Get_Battery_Cap Message
6.5.4 Get_Battery_Status Message
Table 6-40 Get Battery Cap Data Block (GBCDB)
Figure 6-31 Get_Battery_Cap Message <\/td>\n<\/tr>\n
155<\/td>\n6.5.5 Battery_Capabilities Message
Table 6-41 Get Battery Status Data Block (GBSDB)
Table 6-42 Battery Capability Data Block (BCDB)
Figure 6-32 Get_Battery_Status Message
Figure 6-33 Battery_Capabilities Message <\/td>\n<\/tr>\n
156<\/td>\n6.5.6 Get_Manufacturer_Info Message
6.5.7 Manufacturer_Info Message
Table 6-43 Get Manufacturer Info Data Block (GMIDB)
Figure 6-34 Get_Manufacturer_Info Message
Figure 6-35 Manufacturer_Info Message <\/td>\n<\/tr>\n
157<\/td>\n6.5.8 Security Messages
Table 6-44 Manufacturer Info Data Block (MIDB)
Figure 6-36 Security_Request Message <\/td>\n<\/tr>\n
158<\/td>\n6.5.9 Firmware Update Messages
6.6 Timers
6.6.1 CRCReceiveTimer
Figure 6-37 Security_Response Message
Figure 6-38 Firmware_Update_Request Message
Figure 6-39 Firmware_Update_Response Message <\/td>\n<\/tr>\n
159<\/td>\n6.6.2 SenderResponseTimer
6.6.3 Capability Timers <\/td>\n<\/tr>\n
160<\/td>\n6.6.4 Wait Timers and Times
6.6.5 Power Supply Timers <\/td>\n<\/tr>\n
161<\/td>\n6.6.6 NoResponseTimer <\/td>\n<\/tr>\n
162<\/td>\n6.6.7 BIST Timers
6.6.8 Power Role Swap Timers
6.6.9 Soft Reset Timers <\/td>\n<\/tr>\n
163<\/td>\n6.6.10 Hard Reset Timers
6.6.11 Structured VDM Timers <\/td>\n<\/tr>\n
164<\/td>\n6.6.12 Vconn Timers <\/td>\n<\/tr>\n
165<\/td>\n6.6.13 tCableMessage
6.6.14 DiscoverIdentityTimer
6.6.15 Collision Avoidance Timers
6.6.16 tFRSwapInit
6.6.17 Time Values and Timers <\/td>\n<\/tr>\n
166<\/td>\nTable 6-45 Time Values <\/td>\n<\/tr>\n
167<\/td>\nTable 6-46 Timers <\/td>\n<\/tr>\n
168<\/td>\n6.7 Counters
6.7.1 MessageID Counter
6.7.2 Retry Counter <\/td>\n<\/tr>\n
169<\/td>\n6.7.3 Hard Reset Counter
6.7.4 Capabilities Counter
6.7.5 Discover Identity Counter
6.7.6 VDMBusyCounter
6.7.7 Counter Values and Counters
Table 6-47 Counter parameters <\/td>\n<\/tr>\n
170<\/td>\n6.8 Reset
6.8.1 Soft Reset and Protocol Error
Table 6-48 Counters <\/td>\n<\/tr>\n
171<\/td>\n6.8.2 Hard Reset
6.8.3 Cable Reset
6.9 Collision Avoidance <\/td>\n<\/tr>\n
172<\/td>\n6.10 Message Discarding
Table 6-49 Message discarding <\/td>\n<\/tr>\n
173<\/td>\n6.11 State behavior
6.11.1 Introduction to state diagrams used in Chapter 6
6.11.2 State Operation
Figure 6-40 Outline of States
Figure 6-41 References to states <\/td>\n<\/tr>\n
174<\/td>\nFigure 6-42 Common Protocol Layer Message transmission State Diagram <\/td>\n<\/tr>\n
177<\/td>\nFigure 6-43 Source Protocol Layer Message transmission State Diagram <\/td>\n<\/tr>\n
178<\/td>\nFigure 6-44 Sink Protocol Layer Message transmission State Diagram <\/td>\n<\/tr>\n
180<\/td>\nFigure 6-45 Protocol layer Message reception <\/td>\n<\/tr>\n
182<\/td>\nFigure 6-46 Hard\/Cable Reset <\/td>\n<\/tr>\n
185<\/td>\n6.11.3 List of Protocol Layer States
Table 6-50 Protocol Layer States <\/td>\n<\/tr>\n
186<\/td>\n6.12 Message Applicability <\/td>\n<\/tr>\n
187<\/td>\n6.12.1 Applicability of Control Messages
Table 6-51 Applicability of Control Messages <\/td>\n<\/tr>\n
188<\/td>\n6.12.2 Applicability of Data Messages
6.12.3 Applicability of Extended Messages
Table 6-52 Applicability of Data Messages
Table 6-53 Applicability of Extended Messages <\/td>\n<\/tr>\n
189<\/td>\n6.12.4 Applicability of Structured VDM Commands
Table 6-54 Applicability of Structured VDM Commands <\/td>\n<\/tr>\n
190<\/td>\n6.12.5 Applicability of Reset Signaling
6.12.6 Applicability of Fast Role Swap signal
Table 6-55 Applicability of Reset Signaling
Table 6-56 Applicability of Fast Role Swap signal <\/td>\n<\/tr>\n
191<\/td>\n6.13 Value Parameters
7 Power Supply
7.1 Source Requirements
7.1.1 Behavioral Aspects
7.1.2 Source Bulk Capacitance
Table 6-57 Value Parameters <\/td>\n<\/tr>\n
192<\/td>\n7.1.3 Types of Sources
7.1.4 Positive Voltage Transitions
Figure 7-1 Placement of Source Bulk Capacitance <\/td>\n<\/tr>\n
193<\/td>\n7.1.5 Negative Voltage Transitions
Figure 7-2 Transition Envelope for Positive Voltage Transitions <\/td>\n<\/tr>\n
194<\/td>\n7.1.6 Response to Hard Resets
Figure 7-3 Transition Envelope for Negative Voltage Transitions <\/td>\n<\/tr>\n
195<\/td>\n7.1.7 Changing the Output Power Capability
7.1.8 Robust Source Operation
Figure 7-4 Source VBUS Response to Hard Reset <\/td>\n<\/tr>\n
196<\/td>\n7.1.9 Output Voltage Tolerance and Range <\/td>\n<\/tr>\n
197<\/td>\n7.1.10 Charging and Discharging the Bulk Capacitance on VBUS
7.1.11 Swap Standby for Sources
7.1.12 Source Peak Current Operation
Figure 7-5 Application of vSrcNew and vSrcValid limits after tSrcReady <\/td>\n<\/tr>\n
198<\/td>\nFigure 7-6 Source Peak Current Overload <\/td>\n<\/tr>\n
199<\/td>\n7.1.13 Source Capabilities Extended Parameters <\/td>\n<\/tr>\n
200<\/td>\n7.1.14 Fast Role Swap
Figure 7-7 Holdup Time Measurement <\/td>\n<\/tr>\n
201<\/td>\nFigure 7-8 VBUS Power during Fast Role Swap
Figure 7-9 VBUS detection and timing during Fast Role Swap <\/td>\n<\/tr>\n
202<\/td>\n7.2 Sink Requirements
7.2.1 Behavioral Aspects
7.2.2 Sink Bulk Capacitance
7.2.3 Sink Standby
7.2.4 Suspend Power Consumption
Figure 7-10 Placement of Sink Bulk Capacitance <\/td>\n<\/tr>\n
203<\/td>\n7.2.5 Zero Negotiated Current
7.2.6 Transient Load Behavior
7.2.7 Swap Standby for Sinks
7.2.8 Sink Peak Current Operation
7.2.9 Robust Sink Operation <\/td>\n<\/tr>\n
204<\/td>\n7.2.10 Fast Role Swap <\/td>\n<\/tr>\n
206<\/td>\n7.3 Transitions <\/td>\n<\/tr>\n
207<\/td>\n7.3.1 Increasing the Current
Figure 7-11 Transition Diagram for Increasing the Current <\/td>\n<\/tr>\n
208<\/td>\nTable 7-1 Sequence Description for Increasing the Current <\/td>\n<\/tr>\n
209<\/td>\n7.3.2 Increasing the Voltage
Figure 7-12 Transition Diagram for Increasing the Voltage <\/td>\n<\/tr>\n
210<\/td>\nTable 7-2 Sequence Description for Increasing the Voltage <\/td>\n<\/tr>\n
211<\/td>\n7.3.3 Increasing the Voltage and Current
Figure 7-13 Transition Diagram for Increasing the Voltage and Current <\/td>\n<\/tr>\n
212<\/td>\nTable 7-3 Sequence Diagram for Increasing the Voltage and Current <\/td>\n<\/tr>\n
213<\/td>\n7.3.4 Increasing the Voltage and Decreasing the Current
Figure 7-14 Transition Diagram for Increasing the Voltage and Decreasing the Current <\/td>\n<\/tr>\n
214<\/td>\nTable 7-4 Sequence Description for Increasing the Voltage and Decreasing the Current <\/td>\n<\/tr>\n
215<\/td>\n7.3.5 Decreasing the Voltage and Increasing the Current
Figure 7-15 Transition Diagram for Decreasing the Voltage and Increasing the Current <\/td>\n<\/tr>\n
216<\/td>\nTable 7-5 Sequence Description for Decreasing the Voltage and Increasing the Current <\/td>\n<\/tr>\n
217<\/td>\n7.3.6 Decreasing the Current
Figure 7-16 Transition Diagram for Decreasing the Current <\/td>\n<\/tr>\n
218<\/td>\nTable 7-6 Sequence Description for Decreasing the Current <\/td>\n<\/tr>\n
219<\/td>\n7.3.7 Decreasing the Voltage
Figure 7-17 Transition Diagram for Decreasing the Voltage <\/td>\n<\/tr>\n
220<\/td>\nTable 7-7 Sequence Description for Decreasing the Voltage <\/td>\n<\/tr>\n
221<\/td>\n7.3.8 Decreasing the Voltage and the Current
Figure 7-18 Transition Diagram for Decreasing the Voltage and the Current <\/td>\n<\/tr>\n
222<\/td>\nTable 7-8 Sequence Description for Decreasing the Voltage and the Current <\/td>\n<\/tr>\n
223<\/td>\n7.3.9 Sink Requested Power Role Swap
Figure 7-19 Transition Diagram for a Sink Requested Power Role Swap <\/td>\n<\/tr>\n
224<\/td>\nTable 7-9 Sequence Description for a Sink Requested Power Role Swap <\/td>\n<\/tr>\n
226<\/td>\n7.3.10 Source Requested Power Role Swap
Figure 7-20 Transition Diagram for a Source Requested Power Role Swap <\/td>\n<\/tr>\n
227<\/td>\nTable 7-10 Sequence Description for a Source Requested Power Role Swap <\/td>\n<\/tr>\n
229<\/td>\n7.3.11 GotoMin Current Decrease
Figure 7-21 Transition Diagram for a GotoMin Current Decrease <\/td>\n<\/tr>\n
230<\/td>\nTable 7-11 Sequence Description for a GotoMin Current Decrease <\/td>\n<\/tr>\n
231<\/td>\n7.3.12 Source Initiated Hard Reset
Figure 7-22 Transition Diagram for a Source Initiated Hard Reset <\/td>\n<\/tr>\n
232<\/td>\nTable 7-12 Sequence Description for a Source Initiated Hard Reset <\/td>\n<\/tr>\n
233<\/td>\n7.3.13 Sink Initiated Hard Reset
Figure 7-23 Transition Diagram for a Sink Initiated Hard Reset <\/td>\n<\/tr>\n
234<\/td>\nTable 7-13 Sequence Description for a Sink Initiated Hard Reset <\/td>\n<\/tr>\n
235<\/td>\n7.3.14 No change in Current or Voltage
Figure 7-24 Transition Diagram for no change in Current or Voltage <\/td>\n<\/tr>\n
236<\/td>\nTable 7-14 Sequence Description for no change in Current or Voltage <\/td>\n<\/tr>\n
237<\/td>\n7.3.15 Fast Role Swap
Table 7-15 Sequence Description for Fast Role Swap
Figure 7-25 Transition Diagram for Fast Role Swap <\/td>\n<\/tr>\n
239<\/td>\n7.4 Electrical Parameters
7.4.1 Source Electrical Parameters
Table 7-16 Source Electrical Parameters <\/td>\n<\/tr>\n
241<\/td>\n7.4.2 Sink Electrical Parameters
Table 7-17 Sink Electrical Parameters <\/td>\n<\/tr>\n
242<\/td>\n7.4.3 Common Electrical Parameters
8 Device Policy
8.1 Overview
8.2 Device Policy Manager
Table 7-18 Common Source\/Sink Electrical Parameters <\/td>\n<\/tr>\n
244<\/td>\n8.2.1 Capabilities
8.2.2 System Policy
8.2.3 Control of Source\/Sink
8.2.4 Cable Detection <\/td>\n<\/tr>\n
245<\/td>\n8.2.5 Managing Power Requirements <\/td>\n<\/tr>\n
246<\/td>\n8.2.6 Use of \u201cExternally Powered\u201d bit with Batteries and AC supplies <\/td>\n<\/tr>\n
247<\/td>\nFigure 8-1 Example of daisy chained displays <\/td>\n<\/tr>\n
248<\/td>\n8.2.7 Interface to the Policy Engine
8.3 Policy Engine
8.3.1 Introduction <\/td>\n<\/tr>\n
249<\/td>\n8.3.2 Atomic Message Sequence Diagrams
Table 8-1 Basic Message Flow
Figure 8-2 Basic Message Exchange (Successful) <\/td>\n<\/tr>\n
250<\/td>\nTable 8-2 Potential issues in Basic Message Flow
Figure 8-3 Basic Message flow indicating possible errors <\/td>\n<\/tr>\n
251<\/td>\nFigure 8-4 Basic Message Flow with Bad CRC followed by a Retry <\/td>\n<\/tr>\n
252<\/td>\nTable 8-3 Basic Message Flow with CRC failure
Table 8-4 Interruptible and Non-interruptible AMS <\/td>\n<\/tr>\n
254<\/td>\nFigure 8-5 Successful Power Negotiation <\/td>\n<\/tr>\n
255<\/td>\nTable 8-5 Steps for a successful Power Negotiation <\/td>\n<\/tr>\n
258<\/td>\nTable 8-6 Steps for a GotoMin Negotiation
Figure 8-6 Successful GotoMin operation <\/td>\n<\/tr>\n
260<\/td>\nTable 8-7 Steps for a Soft Reset
Figure 8-7 Soft Reset <\/td>\n<\/tr>\n
262<\/td>\nFigure 8-8 Source initiated Hard Reset <\/td>\n<\/tr>\n
263<\/td>\nTable 8-8 Steps for Source initiated Hard Reset <\/td>\n<\/tr>\n
265<\/td>\nFigure 8-9 Sink Initiated Hard Reset <\/td>\n<\/tr>\n
266<\/td>\nTable 8-9 Steps for Sink initiated Hard Reset <\/td>\n<\/tr>\n
268<\/td>\nFigure 8-10 Source initiated reset – Sink long reset <\/td>\n<\/tr>\n
269<\/td>\nTable 8-10 Steps for Source initiated Hard Reset \u2013 Sink long reset <\/td>\n<\/tr>\n
272<\/td>\nFigure 8-11 Successful Power Role Swap Sequence Initiated by the Source <\/td>\n<\/tr>\n
273<\/td>\nTable 8-11 Steps for a Successful Source Initiated Power Role Swap Sequence <\/td>\n<\/tr>\n
277<\/td>\nFigure 8-12 Successful Power Role Swap Sequence Initiated by the Sink <\/td>\n<\/tr>\n
278<\/td>\nTable 8-12 Steps for a Successful Sink Initiated Power Role Swap Sequence <\/td>\n<\/tr>\n
282<\/td>\nFigure 8-13 Successful Fast Role Swap Sequence <\/td>\n<\/tr>\n
283<\/td>\nTable 8-13 Steps for a Successful Fast Role Swap Sequence <\/td>\n<\/tr>\n
286<\/td>\nFigure 8-14 Data Role Swap, UFP operating as Sink initiates <\/td>\n<\/tr>\n
287<\/td>\nTable 8-14 Steps for Data Role Swap, UFP operating as Sink initiates <\/td>\n<\/tr>\n
289<\/td>\nTable 8-15 Steps for Data Role Swap, UFP operating as Source initiates
Figure 8-15 Data Role Swap, UFP operating as Source initiates <\/td>\n<\/tr>\n
292<\/td>\nFigure 8-16 Data Role Swap, DFP operating as Source initiates <\/td>\n<\/tr>\n
293<\/td>\nTable 8-16 Steps for Data Role Swap, DFP operating as Source initiates <\/td>\n<\/tr>\n
295<\/td>\nTable 8-17 Steps for Data Role Swap, DFP operating as Sink initiates
Figure 8-17 Data Role Swap, DFP operating as Sink initiates <\/td>\n<\/tr>\n
298<\/td>\nFigure 8-18 Source to Sink VCONN Source Swap <\/td>\n<\/tr>\n
299<\/td>\nTable 8-18 Steps for Source to Sink VCONN Source Swap <\/td>\n<\/tr>\n
301<\/td>\nFigure 8-19 Sink to Source VCONN Source Swap <\/td>\n<\/tr>\n
302<\/td>\nTable 8-19 Steps for Sink to Source VCONN Source Swap <\/td>\n<\/tr>\n
304<\/td>\nTable 8-20 Steps for Source Alert to Sink
Figure 8-20 Source Alert to Sink <\/td>\n<\/tr>\n
306<\/td>\nTable 8-21 Steps for Sink Alert to Source
Figure 8-21 Sink Alert to Source <\/td>\n<\/tr>\n
308<\/td>\nTable 8-22 Steps for a Sink getting Source status Sequence
Figure 8-22 Sink Gets Source Status <\/td>\n<\/tr>\n
310<\/td>\nTable 8-23 Steps for a Source getting Sink status Sequence
Figure 8-23 Source Gets Sink Status
Figure 8-23 Source Gets Sink Status <\/td>\n<\/tr>\n
312<\/td>\nTable 8-24 Steps for a Sink getting Source capabilities Sequence
Figure 8-24 Sink Gets Source\u2019s Capabilities <\/td>\n<\/tr>\n
314<\/td>\nTable 8-25 Steps for a Dual-Role Source getting Dual-Role Sink\u2019s capabilities as a Source Sequence
Figure 8-25 Dual-Role Source Gets Dual-Role Sink\u2019s Capabilities as a Source <\/td>\n<\/tr>\n
316<\/td>\nTable 8-26 Steps for a Source getting Sink capabilities Sequence
Figure 8-26 Source Gets Sink\u2019s Capabilities <\/td>\n<\/tr>\n
318<\/td>\nTable 8-27 Steps for a Dual-Role Sink getting Dual-Role Source capabilities as a Sink Sequence
Figure 8-27 Dual-Role Sink Gets Dual-Role Source\u2019s Capabilities as a Sink <\/td>\n<\/tr>\n
320<\/td>\nTable 8-28 Steps for a Sink getting Source extended capabilities Sequence
Figure 8-28 Sink Gets Source\u2019s Extended Capabilities <\/td>\n<\/tr>\n
322<\/td>\nTable 8-29 Steps for a Dual-Role Source getting Dual-Role Sink extended capabilities Sequence
Figure 8-29 Dual-Role Source Gets Dual-Role Sink\u2019s Extended Capabilities <\/td>\n<\/tr>\n
324<\/td>\nTable 8-30 Steps for a Sink getting Source Battery capabilities Sequence
Figure 8-30 Sink Gets Source\u2019s Battery Capabilities <\/td>\n<\/tr>\n
326<\/td>\nTable 8-31 Steps for a Source getting Sink Battery capabilities Sequence
Figure 8-31 Source Gets Sink\u2019s Battery Capabilities <\/td>\n<\/tr>\n
328<\/td>\nTable 8-32 Steps for a Source getting Sink\u2019s Port Manufacturer information Sequence
Figure 8-32 Source Gets Sink\u2019s Port Manufacturer Information <\/td>\n<\/tr>\n
330<\/td>\nTable 8-33 Steps for a Source getting Sink\u2019s Port Manufacturer information Sequence
Figure 8-33 Sink Gets Source\u2019s Port Manufacturer Information <\/td>\n<\/tr>\n
332<\/td>\nTable 8-34 Steps for a Source getting Sink\u2019s Battery Manufacturer information Sequence
Figure 8-34 Source Gets Sink\u2019s Battery Manufacturer Information <\/td>\n<\/tr>\n
334<\/td>\nTable 8-35 Steps for a Source getting Sink\u2019s Battery Manufacturer information Sequence
Figure 8-35 Sink Gets Source\u2019s Battery Manufacturer Information <\/td>\n<\/tr>\n
336<\/td>\nTable 8-36 Steps for a Source getting Sink\u2019s Port Manufacturer information Sequence
Figure 8-36 VCONN Source Gets Cable Plug\u2019s Manufacturer Information <\/td>\n<\/tr>\n
338<\/td>\nTable 8-37 Steps for a Source requesting a security exchange with a Sink Sequence
Figure 8-37 Source requests security exchange with Sink <\/td>\n<\/tr>\n
340<\/td>\nTable 8-38 Steps for a Sink requesting a security exchange with a Source Sequence
Figure 8-38 Sink requests security exchange with Source <\/td>\n<\/tr>\n
342<\/td>\nTable 8-39 Steps for a Vconn Source requesting a security exchange with a Cable Plug Sequence
Figure 8-39 Vconn Source requests security exchange with Cable Plug <\/td>\n<\/tr>\n
344<\/td>\nTable 8-40 Steps for a Source requesting a firmware update exchange with a Sink Sequence
Figure 8-40 Source requests firmware update exchange with Sink <\/td>\n<\/tr>\n
346<\/td>\nTable 8-41 Steps for a Sink requesting a firmware update exchange with a Source Sequence
Table 8-41 Steps for a Sink requesting a firmware update exchange with a Source Sequence
Figure 8-41 Sink requests firmware update exchange with Source <\/td>\n<\/tr>\n
348<\/td>\nTable 8-42 Steps for a Vconn Source requesting a firmware update exchange with a Cable Plug Sequence
Figure 8-42 Vconn Source requests firmware update exchange with Cable Plug <\/td>\n<\/tr>\n
350<\/td>\nTable 8-43 Steps for DFP to UFP Discover Identity
Figure 8-43 DFP to UFP Discover Identity <\/td>\n<\/tr>\n
352<\/td>\nTable 8-44 Steps for Source Port to Cable Plug Discover Identity
Table 8-44 Steps for Source Port to Cable Plug Discover Identity
Figure 8-44 Source Port to Cable Plug Discover Identity <\/td>\n<\/tr>\n
354<\/td>\nTable 8-45 Steps for DFP to Cable Plug Discover Identity
Figure 8-45 DFP to Cable Plug Discover Identity <\/td>\n<\/tr>\n
357<\/td>\nTable 8-46 Steps for DFP to UFP Enter Mode
Figure 8-46 DFP to UFP Enter Mode <\/td>\n<\/tr>\n
359<\/td>\nFigure 8-47 DFP to UFP Exit Mode <\/td>\n<\/tr>\n
360<\/td>\nTable 8-47 Steps for DFP to UFP Exit Mode <\/td>\n<\/tr>\n
362<\/td>\nFigure 8-48 DFP to Cable Plug Enter Mode <\/td>\n<\/tr>\n
363<\/td>\nTable 8-48 Steps for DFP to Cable Plug Enter Mode <\/td>\n<\/tr>\n
365<\/td>\nTable 8-49 Steps for DFP to Cable Plug Exit Mode
Figure 8-49 DFP to Cable Plug Exit Mode <\/td>\n<\/tr>\n
367<\/td>\nTable 8-50 Steps for UFP to DFP Attention
Figure 8-50 UFP to DFP Attention <\/td>\n<\/tr>\n
369<\/td>\nFigure 8-51 BIST Carrier Mode Test <\/td>\n<\/tr>\n
370<\/td>\nTable 8-51 Steps for BIST Eye Pattern Test <\/td>\n<\/tr>\n
371<\/td>\n8.3.3 State Diagrams
Figure 8-52 Outline of States
Figure 8-53 References to states
Figure 8-54 Example of state reference with conditions <\/td>\n<\/tr>\n
372<\/td>\nFigure 8-55 Example of state reference with the same entry and exit <\/td>\n<\/tr>\n
373<\/td>\nFigure 8-56 Source Port Policy Engine state diagram <\/td>\n<\/tr>\n
379<\/td>\nFigure 8-57 Sink Port state diagram <\/td>\n<\/tr>\n
383<\/td>\nFigure 8-58 Source Port Soft Reset and Protocol Error State Diagram <\/td>\n<\/tr>\n
384<\/td>\nFigure 8-59 Sink Port Soft Reset and Protocol Error Diagram <\/td>\n<\/tr>\n
385<\/td>\nFigure 8-60 Source Port Not Supported Message State Diagram <\/td>\n<\/tr>\n
386<\/td>\nFigure 8-61 Sink Port Not Supported Message State Diagram
Figure 8-62 Source Port Ping State Diagram <\/td>\n<\/tr>\n
387<\/td>\nFigure 8-63 Source Port Source Alert State Diagram
Figure 8-64 Sink Port Source Alert State Diagram
Figure 8-65 Sink Port Sink Alert State Diagram <\/td>\n<\/tr>\n
388<\/td>\nFigure 8-66 Source Port Sink Alert State Diagram
Figure 8-67 Sink Port Get Source Capabilities Extended state diagram <\/td>\n<\/tr>\n
389<\/td>\nFigure 8-68 Source Give Source Capabilities Extended state diagram
Figure 8-69 Sink Port Get Source Status state diagram <\/td>\n<\/tr>\n
390<\/td>\nFigure 8-70 Source Give Source Status state diagram
Figure 8-71 Source Port Get Sink Status state diagram
Figure 8-72 Sink Give Sink Status state diagram <\/td>\n<\/tr>\n
391<\/td>\nFigure 8-73 Get Battery Capabilities state diagram
Figure 8-74 Give Battery Capabilities state diagram <\/td>\n<\/tr>\n
392<\/td>\nFigure 8-75 Get Battery Status state diagram
Figure 8-76 Give Battery Status state diagram <\/td>\n<\/tr>\n
393<\/td>\nFigure 8-77 Get Manufacturer Information state diagram
Figure 8-78 Give Manufacturer Information state diagram <\/td>\n<\/tr>\n
394<\/td>\nFigure 8-79 Send security request state diagram
Figure 8-80 Send security response state diagram <\/td>\n<\/tr>\n
395<\/td>\nFigure 8-81 Security response received state diagram <\/td>\n<\/tr>\n
396<\/td>\nFigure 8-82 Send firmware update request state diagram
Figure 8-83 Send firmware update response state diagram <\/td>\n<\/tr>\n
397<\/td>\nFigure 8-84 Firmware update response received state diagram <\/td>\n<\/tr>\n
398<\/td>\nFigure 8-85: DFP to UFP Data Role Swap State Diagram <\/td>\n<\/tr>\n
400<\/td>\nFigure 8-86: UFP to DFP Data Role Swap State Diagram <\/td>\n<\/tr>\n
402<\/td>\nFigure 8-87: Dual-Role Port in Source to Sink Power Role Swap State Diagram <\/td>\n<\/tr>\n
405<\/td>\nFigure 8-88: Dual-role Port in Sink to Source Power Role Swap State Diagram <\/td>\n<\/tr>\n
408<\/td>\nFigure 8-89: Dual-Role Port in Source to Sink Fast Role Swap State Diagram <\/td>\n<\/tr>\n
411<\/td>\nFigure 8-90: Dual-role Port in Sink to Source Fast Role Swap State Diagram <\/td>\n<\/tr>\n
413<\/td>\nFigure 8-91 Dual-Role (Source) Get Source Capabilities diagram
Figure 8-92 Dual-Role (Source) Give Sink Capabilities diagram <\/td>\n<\/tr>\n
414<\/td>\nFigure 8-93 Dual-Role (Sink) Get Sink Capabilities State Diagram
Figure 8-94 Dual-Role (Sink) Give Source Capabilities State Diagram <\/td>\n<\/tr>\n
415<\/td>\nFigure 8-95 Dual-Role (Source) Get Source Capabilities Extended state diagram
Figure 8-96 Dual-Role (Source) Give Sink Capabilities diagram <\/td>\n<\/tr>\n
416<\/td>\nFigure 8-97 VCONN Swap State Diagram <\/td>\n<\/tr>\n
418<\/td>\nFigure 8-98 Initiator to Port VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
419<\/td>\nFigure 8-99 Initiator VDM Discover SVIDs State Diagram <\/td>\n<\/tr>\n
420<\/td>\nFigure 8-100 Initiator VDM Discover Modes State Diagram <\/td>\n<\/tr>\n
421<\/td>\nFigure 8-101 Initiator VDM Attention State Diagram <\/td>\n<\/tr>\n
422<\/td>\nFigure 8-102 Responder Structured VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
423<\/td>\nFigure 8-103 Responder Structured VDM Discover SVIDs State Diagram
Figure 8-104 Responder Structured VDM Discover Modes State Diagram <\/td>\n<\/tr>\n
424<\/td>\nFigure 8-105 Receiving a Structured VDM Attention State Diagram <\/td>\n<\/tr>\n
425<\/td>\nFigure 8-106 DFP VDM Mode Entry State Diagram <\/td>\n<\/tr>\n
426<\/td>\nFigure 8-107 DFP VDM Mode Exit State Diagram <\/td>\n<\/tr>\n
427<\/td>\nFigure 8-108 UFP Structured VDM Enter Mode State Diagram <\/td>\n<\/tr>\n
428<\/td>\nFigure 8-109 UFP Structured VDM Exit Mode State Diagram <\/td>\n<\/tr>\n
429<\/td>\nFigure 8-110 Cable Ready VDM State Diagram
Figure 8-111 Cable Plug Soft Reset State Diagram <\/td>\n<\/tr>\n
430<\/td>\nFigure 8-112 Cable Plug Hard Reset State Diagram <\/td>\n<\/tr>\n
431<\/td>\nFigure 8-113 DFP Soft Reset or Cable Reset of a Cable Plug State Diagram <\/td>\n<\/tr>\n
432<\/td>\nFigure 8-114 UFP Source Soft Reset of a Cable Plug State Diagram <\/td>\n<\/tr>\n
433<\/td>\nFigure 8-115 Source Startup Structured VDM Discover Identity State Diagram <\/td>\n<\/tr>\n
434<\/td>\nFigure 8-116 Cable Plug Structured VDM Enter Mode State Diagram <\/td>\n<\/tr>\n
435<\/td>\nFigure 8-117 Cable Plug Structured VDM Exit Mode State Diagram <\/td>\n<\/tr>\n
437<\/td>\nFigure 8-118 BIST Carrier Mode State Diagram <\/td>\n<\/tr>\n
439<\/td>\nTable 8-52 Policy Engine States <\/td>\n<\/tr>\n
444<\/td>\n9 States and Status Reporting
9.1 Overview <\/td>\n<\/tr>\n
445<\/td>\nFigure 9-1 Example PD Topology <\/td>\n<\/tr>\n
446<\/td>\n9.1.1 PDUSB Device and Hub Requirements
9.1.2 Mapping to USB Device States
Figure 9-2 Mapping of PD Topology to USB <\/td>\n<\/tr>\n
447<\/td>\nFigure 9-3 USB Attached to USB Powered State Transition <\/td>\n<\/tr>\n
448<\/td>\nFigure 9-4 Any USB State to USB Attached State Transition (When operating as a Consumer)
Figure 9-5 Any USB State to USB Attached State Transition (When operating as a Provider) <\/td>\n<\/tr>\n
449<\/td>\n9.1.3 PD Software Stack
9.1.4 PDUSB Device Enumeration
Figure 9-6 Any USB State to USB Attached State Transition (After a USB Type-C Data Role Swap)
Figure 9-7 Software stack on a PD aware OS <\/td>\n<\/tr>\n
450<\/td>\nFigure 9-8 Enumeration of a PDUSB Device <\/td>\n<\/tr>\n
451<\/td>\n9.2 PD Class Specific Descriptors
9.2.1 USB Power Delivery Capability Descriptor
Table 9-1 USB Power Delivery Type Codes
Table 9-2 USB Power Delivery Capability Descriptor <\/td>\n<\/tr>\n
452<\/td>\n9.2.2 Battery Info Capability Descriptor <\/td>\n<\/tr>\n
453<\/td>\n9.2.3 PD Consumer Port Capability Descriptor
Table 9-3 Battery Info Capability Descriptor <\/td>\n<\/tr>\n
454<\/td>\n9.2.4 PD Provider Port Capability Descriptor
Table 9-4 PD Consumer Port Descriptor <\/td>\n<\/tr>\n
455<\/td>\nTable 9-5 PD Provider Port Descriptor <\/td>\n<\/tr>\n
456<\/td>\n9.3 PD Class Specific Requests and Events
9.3.1 Class-specific Requests
Table 9-6 PD Class Requests
Table 9-7 PD Class Request Codes
Table 9-8 PD Class Feature Selectors <\/td>\n<\/tr>\n
457<\/td>\n9.4 PDUSB Hub and PDUSB Peripheral Device Requests
9.4.1 GetBatteryStatus
Table 9-9 Battery Status Structure <\/td>\n<\/tr>\n
458<\/td>\n9.4.2 SetPDFeature <\/td>\n<\/tr>\n
459<\/td>\nTable 9-10 Battery Wake Mask
Table 9-11 Charging Policy Encoding <\/td>\n<\/tr>\n
460<\/td>\n10 Power Rules
10.1 Introduction
10.2 Source Power Rules
10.2.1 Source Power Rule Considerations
Table 10-1 Considerations for Sources <\/td>\n<\/tr>\n
461<\/td>\n10.2.2 Normative Voltages and Currents
Table 10-2 Normative Voltages and Currents
Figure 10-1 Source Power Rule Illustration <\/td>\n<\/tr>\n
462<\/td>\nTable 10-3 Fixed Supply PDO \u2013 Source 5V
Figure 10-2 Source Power Rule Example <\/td>\n<\/tr>\n
463<\/td>\n10.2.3 Optional Voltages\/Currents
Table 10-4 Fixed Supply PDO \u2013 Source 9V
Table 10-5 Fixed Supply PDO \u2013 Source 15V
Table 10-6 Fixed Supply PDO \u2013 Source 20V <\/td>\n<\/tr>\n
464<\/td>\n10.2.4 Power sharing between ports
10.3 Sink Power Rules
10.3.1 Sink Power Rule Considerations
10.3.2 Normative Sink Rules
Annex A. CRC calculation
A.1 C code example <\/td>\n<\/tr>\n
466<\/td>\nA.2 Table showing the full calculation over one Message <\/td>\n<\/tr>\n
467<\/td>\nAnnex B. PD Message Sequence Examples
B.1 External power is supplied downstream
Figure B-1 External Power supplied downstream <\/td>\n<\/tr>\n
468<\/td>\nTable B-1 External power is supplied downstream <\/td>\n<\/tr>\n
471<\/td>\nB.2 External power is supplied upstream
Table B-2 External power is supplied upstream
Figure B-2 External Power supplied upstream <\/td>\n<\/tr>\n
478<\/td>\nB.3 Giving back power
Table B-3 Giving back power
Figure B-3 Giving Back Power <\/td>\n<\/tr>\n
488<\/td>\nAnnex C. VDM Command Examples
C.1 Discover Identity Example
C.1.1 Discover Identity Command request <\/td>\n<\/tr>\n
489<\/td>\nC.1.2 Discover Identity Command response \u2013 Active Cable
Table C-1 Discover Identity Command request from Initiator Example
Table C-2 Discover Identity Command response from Active Cable Responder Example <\/td>\n<\/tr>\n
490<\/td>\nC.1.3 Discover Identity Command response \u2013 Hub <\/td>\n<\/tr>\n
491<\/td>\nTable C-3 Discover Identity Command response from Hub Responder Example <\/td>\n<\/tr>\n
492<\/td>\nC.2 Discover SVIDs Example
C.2.1 Discover SVIDs Command request
C.2.2 Discover SVIDs Command response
Table C-4 Discover SVIDs Command request from Initiator Example
Table C-5 Discover SVIDs Command response from Responder Example <\/td>\n<\/tr>\n
494<\/td>\nC.3 Discover Modes Example
C.3.1 Discover Modes Command request
C.3.2 Discover Modes Command response
Table C-6 Discover Modes Command request from Initiator Example
Table C-7 Discover Modes Command response from Responder Example <\/td>\n<\/tr>\n
496<\/td>\nC.4 Enter Mode Example
C.4.1 Enter Mode Command request
C.4.2 Enter Mode Command response
Table C-8 Enter Mode Command request from Initiator Example
Table C-9 Enter Mode Command response from Responder Example <\/td>\n<\/tr>\n
497<\/td>\nC.4.1 Enter Mode Command request with additional VDO
Table C-10 Enter Mode Command request from Initiator Example <\/td>\n<\/tr>\n
498<\/td>\nC.5 Exit Mode Example
C.5.1 Exit Mode Command request
C.5.2 Exit Mode Command response
Table C-11 Exit Mode Command request from Initiator Example
Table C-12 Exit Mode Command response from Responder Example <\/td>\n<\/tr>\n
500<\/td>\nC.6 Attention Example
C.6.1 Attention Command request
C.6.2 Attention Command request with additional VDO
Table C-13 Attention Command request from Initiator Example
Table C-14 Attention Command request from Initiator with additional VDO Example <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Universal serial bus interfaces for data and power – Common components. USB Power Delivery specification<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2017<\/td>\n502<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":229298,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2641],"product_tag":[],"class_list":{"0":"post-229290","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-bsi","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/229290","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/229298"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=229290"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=229290"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=229290"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}