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BS EN IEC 62680-1-2:2022

BS EN IEC 62680-1-2:2022

$215.11

Universal serial bus interfaces for data and power – Common components. USB Power Delivery specification

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BSI 2022 712
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IEC 62680-1-2:2022 specification defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies. This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100W. This specification is intended to be fully compatible and extend the existing USB infrastructure. It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. This sixt edition cancels and replaces the fifth edition published in 2021 and constitutes a technical revision. Extended Power Range (EPR) including Adjustable Voltage Supply (AVS) has been added. This docuemnt is the USB-IF publication Universal Serial Bus Power Delivery Specification Revision 3.1, Version 1.1.

PDF Catalog

PDF Pages PDF Title
2 undefined
4 European foreword
Endorsement notice
5 FOREWORD
7 INTRODUCTION
18 English
Table of Contents
54 1 Introduction
1.1 Overview
55 1.2 Purpose
1.3 Scope
56 1.4 Conventions
1.4.1 Precedence
1.4.2 Keywords
57 1.4.3 Numbering
1.5 Related Documents
58 1.6 Terms and Abbreviations
Tables
Table 11 Terms and Abbreviations
66 1.7 Parameter Values
67 1.8 Changes from Revision 3.0
1.9 Compatibility with Revision 2.0
2 Overview
2.1 Introduction
68 2.2 Section Overview
69 2.3 Compatibility with Revision 2.0
2.4 USB Power Delivery Capable Devices
Figures
Figure 21 Logical Structure of USB Power Delivery Capable Devices
70 2.5 SOP* Communication
2.5.1 Introduction
2.5.2 SOP* Collision Avoidance
2.5.3 SOP Communication
2.5.4 SOP’/SOP’’ Communication with Cable Plugs
71 Figure 22 Example SOP’ Communication between Vconn Source and Cable Plug(s)
72 2.6 Operational Overview
2.6.1 Source Operation
75 2.6.2 Sink Operation
77 2.6.3 Cable Plugs
78 2.7 Architectural Overview
Figure 23 USB Power Delivery Communications Stack
79 Figure 24 USB Power Delivery Communication Over USB
80 2.7.1 Policy
Figure 25 High Level Architecture View
81 2.7.2 Message Formation and Transmission
2.7.3 Collision Avoidance
82 2.7.4 Power supply
2.7.5 DFP/UFP
83 2.7.6 Cable and Connectors
2.7.7 Interactions between Non-PD, BC and PD devices
2.7.8 Power Rules
2.8 Extended Power Range (EPR) Operation
85 2.9 Charging Models
2.9.1 Fixed Voltage Charging Models
Figure 26 Example of a Normal EPR Mode Operational Flow
Table 21 Fixed Voltage Power Ranges
86 2.9.2 Programmable Power Supply (PPS) Charging Models
2.9.3 Adjustable Voltage Supply (AVS) Charging Models
3 USB Type-A and USB Type-B Cable Assemblies and Connectors
4 Electrical Requirements
4.1 Interoperability with other USB Specifications
Table 22 PPS Voltage Power Ranges
Table 23 EPR Adjustable Voltage Supply Voltage Ranges
87 4.2 Dead Battery Detection / Unpowered Port Detection
4.3 Cable IR Ground Drop (IR Drop)
4.4 Cable Type Detection
5 Physical Layer
5.1 Physical Layer Overview
5.2 Physical Layer Functions
89 5.3 Symbol Encoding
Table 51 4b5b Symbol Encoding Table
90 5.4 Ordered Sets
Figure 51 Interpretation of ordered sets
Table 52 Ordered Sets.
Table 53 Validation of Ordered Sets
91 5.5 Transmitted Bit Ordering
Figure 52 Transmit Order for Various Sizes of Data
Table 54 Data Size
92 5.6 Packet Format
5.6.1 Packet Framing
Figure 53 USB Power Delivery Packet Format
Table 55 SOP ordered set.
93 Table 56 SOP’ ordered set.
Table 57 SOP’’ ordered set.
94 5.6.2 CRC
Table 58 SOP’_Debug ordered set.
Table 59 SOP’’_Debug ordered set.
95 Figure 54 CRC 32 generation
Table 510 CRC-32 Mapping
96 5.6.3 Packet Detection Errors
5.6.4 Hard Reset
Table 511 Hard Reset ordered set.
97 5.6.5 Cable Reset
5.7 Collision Avoidance
Figure 55 Line format of Hard Reset
Figure 56 Line format of Cable Reset
Table 512 Cable Reset ordered set.
98 5.8 Biphase Mark Coding (BMC) Signaling Scheme
5.8.1 Encoding and signaling
Figure 57 BMC Example
Table 513 Rp values used for Collision Avoidance.
99 Figure 58 BMC Transmitter Block Diagram
Figure 59 BMC Receiver Block Diagram
Figure 510 BMC Encoded Start of Preamble
100 Figure 511 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with High-to-Low Last Transition
Figure 512 Transmitting or Receiving BMC Encoded Frame Terminated by One with High-to-Low Last Transition
101 5.8.2 Transmit and Receive Masks
Figure 513 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with Low to High Last Transition
Figure 514 Transmitting or Receiving BMC Encoded Frame Terminated by One with Low to High Last Transition
102 Figure 515 BMC Tx ‘ONE’ Mask
Figure 516 BMC Tx ‘ZERO’ Mask
Table 514 BMC Tx Mask Definition, X Values
103 Table 515 BMC Tx Mask Definition, Y Values
104 Figure 517 BMC Rx ‘ONE’ Mask when Sourcing Power
105 Figure 518 BMC Rx ‘ZERO’ Mask when Sourcing Power
Figure 519 BMC Rx ‘ONE’ Mask when Power neutral
106 Figure 520 BMC Rx ‘ZERO’ Mask when Power neutral
Figure 521 BMC Rx ‘ONE’ Mask when Sinking Power.
107 5.8.3 Transmitter Load Model
Figure 522 BMC Rx ‘ZERO’ Mask when Sinking Power.
Table 516 BMC Rx Mask Definition
108 5.8.4 BMC Common specifications
Figure 523 Transmitter Load Model for BMC Tx from a Source
Figure 524 Transmitter Load Model for BMC Tx from a Sink
109 5.8.5 BMC Transmitter Specifications
Table 517 BMC Common Normative Requirements
Table 518 BMC Transmitter Normative Requirements
110 Figure 525 Transmitter diagram illustrating zDriver
111 Figure 526 Inter-Frame Gap Timings
112 5.8.6 BMC Receiver Specifications
Table 519 BMC Receiver Normative Requirements
113 Figure 527 Example Multi-Drop Configuration showing two DRPs
Figure 528 Example Multi-Drop Configuration showing a DFP and UFP
115 5.9 Built in Self-Test (BIST)
5.9.1 BIST Carrier Mode
5.9.2 BIST Test Data
6 Protocol Layer
6.1 Overview
6.2 Messages
Figure 529 Test Data Frame
116 6.2.1 Message Construction
Figure 61 USB Power Delivery Packet Format including Control Message Payload
Figure 62 USB Power Delivery Packet Format including Data Message Payload
117 Figure 63 USB Power Delivery Packet Format including an Extended Message Header and Payload
Table 61 Message Header
120 Table 62 Revision Interoperability during an Explicit Contract
121 Table 63 Extended Message Header
123 Figure 64 Example Security_Request sequence Unchunked (Chunked bit = 0)
Figure 65 Example byte transmission for Security_Request Message of Data Size 7 (Chunked bit is set to 0)
Table 64 Use of Unchunked Message Supported bit
124 Figure 66 Example byte transmission for Security_Response Message of Data Size 7 (Chunked bit is set to 0)
125 Figure 67 Example Security_Request sequence Chunked (Chunked bit = 1)
Figure 68 Example Security_Request Message of Data Size 7 (Chunked bit set to 1)
126 Figure 69 Example Chunk 0 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Figure 610 Example byte transmission for a Security_Response Message Chunk request (Chunked bit is set to 1)
127 6.3 Control Message
Figure 611 Example Chunk 1 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Table 65 Control Message Types
128 6.3.1 GoodCRC Message
6.3.2 GotoMin Message
6.3.3 Accept Message
129 6.3.4 Reject Message
6.3.5 Ping Message
6.3.6 PS_RDY Message
6.3.7 Get_Source_Cap Message
6.3.8 Get_Sink_Cap Message
130 6.3.9 DR_Swap Message
6.3.10 PR_Swap Message
131 6.3.11 VCONN_Swap Message
6.3.12 Wait Message
133 6.3.13 Soft Reset Message
6.3.14 Data_Reset Message
134 6.3.15 Data_Reset_Complete Message
6.3.16 Not_Supported Message
6.3.17 Get_Source_Cap_Extended Message
6.3.18 Get_Status Message
6.3.19 FR_Swap Message
135 6.3.20 Get_PPS_Status
6.3.21 Get_Country_Codes
6.3.22 Get_Sink_Cap_Extended Message
6.3.23 Get_Source_Info Message
6.3.24 Get_Revision Message
6.4 Data Message
136 6.4.1 Capabilities Message
Table 66 Data Message Types
137 Figure 612 Example Capabilities Message with 2 Power Data Objects
Table 67 Power Data Object
138 Table 68 Augmented Power Data Object
140 Table 69 Fixed Supply PDO – Source
142 Table 610 Fixed Power Source Peak Current Capability
Table 611 Variable Supply (non-Battery) PDO – Source
143 Table 612 Battery Supply PDO – Source
Table 613 SPR Programmable Power Supply APDO – Source
144 Table 614 EPR Adjustable Voltage Supply APDO – Source
Table 615 Fixed Supply PDO – Sink
146 Table 616 Variable Supply (non-Battery) PDO – Sink
Table 617 Battery Supply PDO – Sink
147 6.4.2 Request Message
Table 618 Programmable Power Supply APDO – Sink
Table 619 EPR Adjustable Voltage Supply APDO – Sink
148 Table 620 Fixed and Variable Request Data Object
Table 621 Fixed and Variable Request Data Object with GiveBack Support
Table 622 Battery Request Data Object
Table 623 Battery Request Data Object with GiveBack Support
149 Table 624 Programmable Request Data Object
Table 625 AVS Request Data Object
152 6.4.3 BIST Message
Figure 613 BIST Message
153 Table 626 BIST Data Object
155 6.4.4 Vendor Defined Message
Figure 614 Vendor Defined Message
156 Table 627 Unstructured VDM Header
157 Table 628 Structured VDM Header
158 Table 629 Structured VDM Commands
Table 630 SVID Values
160 Table 631 Commands and Responses
161 Figure 615 Discover Identity Command response
Figure 616 Discover Identity Command response for a DRD
162 Table 632 ID Header VDO
163 Table 633 Product Types (UFP)
Table 634 Product Types (Cable Plug/VPD)
164 Table 635 Product Types (DFP)
Table 636 Cert Stat VDO
Table 637 Product VDO
165 Table 638 UFP VDO
166 Table 639 DFP VDO
167 Table 640 Passive Cable VDO
169 Table 641 Active Cable VDO 1
172 Table 642 Active Cable VDO 2
174 Table 643 VPD VDO
175 Table 644 Discover SVIDs Responder VDO
176 Figure 617 Example Discover SVIDs response with 3 SVIDs
Figure 618 Example Discover SVIDs response with 4 SVIDs
Figure 619 Example Discover SVIDs response with 12 SVIDs followed by an empty response
177 Figure 620 Example Discover Modes response for a given SVID with 3 Modes
178 Figure 621 Successful Enter Mode sequence
Figure 622 Enter Mode sequence Interrupted by Source Capabilities and then Re-run
179 Figure 623 Unsuccessful Enter Mode sequence due to NAK
180 Figure 624 Exit Mode sequence
Figure 625 Attention Command request/response sequence
181 Figure 626 Command request/response sequence
182 Figure 627 Enter/Exit Mode Process
183 6.4.5 Battery_Status Message
Figure 628 Battery_Status Message
Table 645 Battery Status Data Object (BSDO)
184 6.4.6 Alert Message
Figure 629 Alert Message
Table 646 Alert Data Object
186 6.4.7 Get_Country_Info Message
187 6.4.8 Enter_USB Message
Figure 630 Get_Country_Info Message
Figure 631 Enter_USB Message
Table 647 Country Code Data Object
Table 648 Enter_USB Data Object
189 6.4.9 EPR_Request Message
6.4.10 EPR_Mode Message
Figure 632 EPR_Request Message
190 Figure 633 EPR Mode DO Message
Table 649 EPR Mode Data Object (EPRMDO)
191 Figure 634 Illustration of process to enter EPR Mode
194 6.4.11 Source_Info Message
Figure 635 Source_Info Message
Table 650 Source_Info Data Object (SIDO)
195 6.4.12 Revision Message
6.5 Extended Message
Figure 636 Revision Message Data Object
Table 651 Revision Message Data Object (RMDO)
196 6.5.1 Source_Capabilities_Extended Message
Table 652 Extended Message Types
197 Figure 637 Source_Capabilities_Extended Message
Table 653 Source Capabilities Extended Data Block (SCEDB)
201 6.5.2 Status Message
Figure 638 SOP Status Message
Table 654 SOP Status Data Block (SDB)
205 6.5.3 Get_Battery_Cap Message
Figure 639 SOP’/SOP’’ Status Message
Figure 640 Get_Battery_Cap Message
Table 655 SOP’/SOP’’ Status Data Block (SDB)
Table 656 Get Battery Cap Data Block (GBCDB)
206 6.5.4 Get_Battery_Status Message
6.5.5 Battery_Capabilities Message
Figure 641 Get_Battery_Status Message
Figure 642 Battery_Capabilities Message
Table 657 Get Battery Status Data Block (GBSDB)
Table 658 Battery Capability Data Block (BCDB)
207 6.5.6 Get_Manufacturer_Info Message
Figure 643 Get_Manufacturer_Info Message
Table 659 Get Manufacturer Info Data Block (GMIDB)
208 6.5.7 Manufacturer_Info Message
Figure 644 Manufacturer_Info Message
Table 660 Manufacturer Info Data Block (MIDB)
209 6.5.8 Security Messages
Figure 645 Security_Request Message
Figure 646 Security_Response Message
210 6.5.9 Firmware Update Messages
6.5.10 PPS_Status Message
Figure 647 Firmware_Update_Request Message
Figure 648 Firmware_Update_Response Message
Figure 649 PPS_Status Message
Table 661 PPS Status Data Block (PPSSDB)
211 6.5.11 Country_Codes Message
212 6.5.12 Country_Info Message
Figure 650 Country_Codes Message
Figure 651 Country_Info Message
Table 662 Country Codes Data Block (CCDB)
Table 663 Country Info Data Block (CIDB)
213 6.5.13 Sink_Capabilities_Extended Message
Figure 652 Sink_Capabilities_Extended Message
Table 664 Sink Capabilities Extended Data Block (SKEDB)
217 6.5.14 Extended_Control Message
Figure 653 Extended_Control Message
Table 665 Extended Control Data Block (SDB)
Table 666 Extended Control Message Types
218 6.5.15 EPR Capabilities Message
Figure 654 Mapping SPR Capabilities to EPR Capabilities
219 6.5.16 Vendor_Defined_Extended Message
220 6.6 Timers
6.6.1 CRCReceiveTimer
Figure 655 Vendor_Defined_Extended Message
221 6.6.2 SenderResponseTimer
6.6.3 Capability Timers
222 6.6.4 Wait Timers and Times
223 6.6.5 Power Supply Timers
224 6.6.6 NoResponseTimer
225 6.6.7 BIST Timers
6.6.8 Power Role Swap Timers
6.6.9 Soft Reset Timers
6.6.10 Data Reset Timers
226 6.6.11 Hard Reset Timers
227 6.6.12 Structured VDM Timers
228 6.6.13 Vconn Timers
6.6.14 tCableMessage
6.6.15 DiscoverIdentityTimer
6.6.16 Collision Avoidance Timers
229 6.6.17 Fast Role Swap Timers
6.6.18 Chunking Timers
230 6.6.19 Programmable Power Supply Timers
6.6.20 tEnterUSB
231 6.6.21 EPR Timers
6.6.22 Time Values and Timers
232 Table 667 Time Values
233 Table 668 Timers
235 6.7 Counters
6.7.1 MessageID Counter
6.7.2 Retry Counter
236 6.7.3 Hard Reset Counter
6.7.4 Capabilities Counter
6.7.5 Discover Identity Counter
6.7.6 VDMBusyCounter
6.7.7 Counter Values and Counters
Table 669 Counter parameters
237 6.8 Reset
6.8.1 Soft Reset and Protocol Error
Table 670 Counters
Table 671 and
238 Table 671 Response to an incoming Message (except VDM)
239 6.8.2 Data Reset
6.8.3 Hard Reset
Table 672 Response to an incoming VDM
240 6.8.4 Cable Reset
6.9 Collision Avoidance
6.10 Message Discarding
241 Table 673 Message discarding
242 6.11 State behavior
6.11.1 Introduction to state diagrams used in Chapter 6
6.11.2 State Operation
Figure 656 Outline of States
Figure 657 References to states
243 Figure 658 Chunking architecture Showing Message and Control Flow
245 Figure 659 Chunked Rx State Diagram
248 Figure 660 Chunked Tx State Diagram
252 Figure 661 Chunked Message Router State Diagram
254 Figure 662 Common Protocol Layer Message Transmission State Diagram
257 Figure 663 Source Protocol Layer Message Transmission State Diagram
258 Figure 664 Sink Protocol Layer Message Transmission State Diagram
260 Figure 665 Protocol layer Message reception
262 Figure 666 Hard/Cable Reset
265 6.11.3 List of Protocol Layer States
Table 674 Protocol Layer States
267 6.12 Message Applicability
268 6.12.1 Applicability of Control Messages
Table 675 Applicability of Control Messages
269 6.12.2 Applicability of Data Messages
Table 676 Applicability of Data Messages
270 6.12.3 Applicability of Extended Messages
Table 677 Applicability of Extended Messages
272 6.12.4 Applicability of Extended Control Messages
6.12.5 Applicability of Structured VDM Commands
Table 678 Applicability of Extended Control Messages
Table 679 Applicability of Structured VDM Commands
273 6.12.6 Applicability of Reset Signaling
6.12.7 Applicability of Fast Role Swap signal
Table 680 Applicability of Reset Signaling
274 Table 681 Applicability of Fast Role Swap signal
275 6.13 Value Parameters
7 Power Supply
7.1 Source Requirements
7.1.1 Behavioral Aspects
7.1.2 Source Bulk Capacitance
Table 682 Value Parameters
276 7.1.3 Types of Sources
7.1.4 Source Transitions
Figure 71 Placement of Source Bulk Capacitance
277 Figure 72 Transition Envelope for Positive Voltage Transitions
278 Figure 73 Transition Envelope for Negative Voltage Transitions
279 Figure 74 PPS Positive Voltage Transitions
280 Figure 75 PPS Negative Voltage Transitions
Figure 76 Expected PPS Ripple Relative to an LSB
282 Figure 77 SPR PPS Programmable Voltage and Current Limit
283 Figure 78 iPpsCLOperatingDetail
284 Figure 79 SPR PPS Programmable Voltage and Current Limit
285 Figure 710 AVS Positive Voltage Transitions
Figure 711 AVS Negative Voltage Transitions
286 7.1.5 Response to Hard Resets
Figure 712 Expected AVS Ripple Relative to an LSB
287 7.1.6 Changing the Output Power Capability
7.1.7 Robust Source Operation
Figure 713 Source VBUS and Vconn Response to Hard Reset
289 7.1.8 Output Voltage Tolerance and Range
Figure 714 Application of vSrcNew and vSrcValid limits after tSrcReady
290 7.1.9 Charging and Discharging the Bulk Capacitance on VBUS
7.1.10 Swap Standby for Sources
7.1.11 Source Peak Current Operation
291 Figure 715 Source Peak Current Overload
292 7.1.12 Source Capabilities Extended Parameters
293 Figure 716 Holdup Time Measurement
294 7.1.13 Fast Role Swap
Figure 717 VBUS Power during Fast Role Swap
295 7.1.14 Non-application of VBUS Slew Rate Limits
Figure 718 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) > vSafe5V (min).
Figure 719 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) < vSafe5V (min).
296 7.1.15 Vconn Power Cycle
Figure 720 Data Reset UFP Vconn Power Cycle
297 7.2 Sink Requirements
7.2.1 Behavioral Aspects
7.2.2 Sink Bulk Capacitance
Figure 721 Data Reset DFP Vconn Power Cycle
298 7.2.3 Sink Standby
7.2.4 Suspend Power Consumption
7.2.5 Zero Negotiated Current
7.2.6 Transient Load Behavior
Figure 722 Placement of Sink Bulk Capacitance
299 7.2.7 Swap Standby for Sinks
7.2.8 Sink Peak Current Operation
7.2.9 Robust Sink Operation
301 7.2.10 Fast Role Swap
302 7.3 Transitions
303 7.3.1 Increasing the Current
Figure 723 Transition Diagram for Increasing the Current
304 Table 71 Sequence Description for Increasing the Current
305 7.3.2 Increasing the Voltage
Figure 724 Transition Diagram for Increasing the Voltage
306 Table 72 Sequence Description for Increasing the Voltage
307 7.3.3 Increasing the Voltage and Current
Figure 725 Transition Diagram for Increasing the Voltage and Current
308 Table 73 Sequence Diagram for Increasing the Voltage and Current
309 7.3.4 Increasing the Voltage and Decreasing the Current
Figure 726 Transition Diagram for Increasing the Voltage and Decreasing the Current
310 Table 74 Sequence Description for Increasing the Voltage and Decreasing the Current
311 7.3.5 Decreasing the Voltage and Increasing the Current
Figure 727 Transition Diagram for Decreasing the Voltage and Increasing the Current
312 Table 75 Sequence Description for Decreasing the Voltage and Increasing the Current
313 7.3.6 Decreasing the Current
Figure 728 Transition Diagram for Decreasing the Current
314 Table 76 Sequence Description for Decreasing the Current
315 7.3.7 Decreasing the Voltage
Figure 729 Transition Diagram for Decreasing the Voltage
316 Table 77 Sequence Description for Decreasing the Voltage
317 7.3.8 Decreasing the Voltage and the Current
Figure 730 Transition Diagram for Decreasing the Voltage and the Current
318 Table 78 Sequence Description for Decreasing the Voltage and the Current
319 7.3.9 Sink Requested Power Role Swap
Figure 731 Transition Diagram for a Sink Requested Power Role Swap
320 Table 79 Sequence Description for a Sink Requested Power Role Swap
321 7.3.10 Source Requested Power Role Swap
Figure 732 Transition Diagram for a Source Requested Power Role Swap
322 Table 710 Sequence Description for a Source Requested Power Role Swap
323 7.3.11 GotoMin Current Decrease
Figure 733 Transition Diagram for a GotoMin Current Decrease
324 Table 711 Sequence Description for a GotoMin Current Decrease
325 7.3.12 Source Initiated Hard Reset
Figure 734 Transition Diagram for a Source Initiated Hard Reset
326 Table 712 Sequence Description for a Source Initiated Hard Reset
327 7.3.13 Sink Initiated Hard Reset
Figure 735 Transition Diagram for a Sink Initiated Hard Reset
328 Table 713 Sequence Description for a Sink Initiated Hard Reset
329 7.3.14 No change in Current or Voltage
Figure 736 Transition Diagram for no change in Current or Voltage
330 Table 714 Sequence Description for no change in Current or Voltage
331 7.3.15 Fast Role Swap
Figure 737 Transition Diagram for Fast Role Swap
Table 715 Sequence Description for Fast Role Swap
333 7.3.16 Increasing the Programmable Power Supply (PPS) Voltage
Figure 738 Transition Diagram for Increasing the Programmable Power Supply Voltage
Table 716 Sequence Description for Increasing the Programmable Power Supply Voltage
335 7.3.17 Decreasing the Programmable Power Supply (PPS) Voltage
Figure 739 Transition Diagram for Decreasing the Programmable Power Supply Voltage
Table 717 Sequence Description for Decreasing the Programmable Power Supply Voltage
337 7.3.18 Increasing the Adjustable Voltage Supply (AVS) Voltage
Figure 740 Transition Diagram for Increasing the Programmable Power Supply Voltage
Table 718 Sequence Description for Increasing the Adjustable Voltage Supply Voltage
339 7.3.19 Decreasing the Adjustable Voltage Supply (AVS) Voltage
Figure 741 Transition Diagram for Decreasing the Adjustable Voltage Supply Voltage
Table 719 Sequence Description for Decreasing the Adjustable Voltage Supply Voltage
341 7.3.20 Changing the Source PDO or APDO
Figure 742 Transition Diagram for Changing the Source PDO or APDO
Table 720 Sequence Description for Changing the Source PDO or APDO
343 7.3.21 Increasing the Programmable Power Supply Current
Figure 743 Transition Diagram for increasing the Current in PPS mode
Table 721 Sequence Description for increasing the Current in PPS mode
345 7.3.22 Decreasing the Programmable Power Supply Current
Figure 744 Transition Diagram for decreasing the Current in PPS mode
Table 722 Sequence Description for decreasing the Current in PPS mode
347 7.3.23 Same Request Programmable Power Supply
Figure 745 Transition Diagram for no change in Current or Voltage in PPS mode
Table 723 Sequence Description for no change in Current or Voltage in PPS mode
348 7.4 Electrical Parameters
7.4.1 Source Electrical Parameters
Table 724 Source Electrical Parameters
354 7.4.2 Sink Electrical Parameters
Table 725 Sink Electrical Parameters
355 7.4.3 Common Electrical Parameters
Table 726 Common Source/Sink Electrical Parameters
356 8 Device Policy
8.1 Overview
8.2 Device Policy Manager
358 8.2.1 Capabilities
8.2.2 System Policy
8.2.3 Control of Source/Sink
8.2.4 Cable Detection
359 8.2.5 Managing Power Requirements
361 8.2.6 Use of “Unconstrained Power” bit with Batteries and AC supplies
362 Figure 81 Example of daisy chained displays
363 8.2.7 Interface to the Policy Engine
364 8.3 Policy Engine
8.3.1 Introduction
8.3.2 Atomic Message Sequence Diagrams
365 Figure 82 Basic Message Exchange (Successful)
Table 81 Basic Message Flow
366 Figure 83 Basic Message flow indicating possible errors
Table 82 Potential issues in Basic Message Flow
367 Figure 84 Basic Message Flow with Bad CRC followed by a Retry
Table 83 Basic Message Flow with CRC failure
369 Table 84 Interruptible and Non-interruptible AMS
371 Figure 85 Successful Fixed, Variable or Battery SPR Power Negotiation
Table 85 Steps for a successful Power Negotiation
374 Figure 86 Successful GotoMin operation
Table 86 Steps for a GotoMin Negotiation
376 Figure 87 SPR PPS Keep Alive
Table 87 Steps for SPR PPS Keep Alive
379 Figure 88 Entering EPR Mode (Success)
380 Table 88 Steps for Entering EPR Mode (Success)
382 Figure 89 Entering EPR Mode (Failure due to non-EPR cable)
383 Table 89 Steps for Entering EPR Mode (Failure due to non-EPR cable)
385 Figure 810 Entering EPR Mode (Failure of Vconn Swap)
Table 810 Steps for Entering EPR Mode (Failure of Vconn Swap)
388 Figure 811 Successful Fixed EPR Power Negotiation
Table 811 Steps for a successful EPR Power Negotiation
391 Figure 812 EPR Keep Alive
Table 812 Steps for EPR Keep Alive
393 Figure 813 Exiting EPR Mode (Sink Initiated)
Table 813 Steps for Exiting EPR Mode (Sink Initiated)
395 Figure 814 Exiting EPR Mode (Source Initiated)
Table 814 Steps for Exiting EPR Mode (Source Initiated)
397 Figure 815 Soft Reset
Table 815 Steps for a Soft Reset
399 Figure 816 DFP Initiated Data Reset where the DFP is the Vconn Source
400 Table 816 Steps for a DFP Initiated Data Reset where the DFP is the Vconn Source
402 Figure 817 DFP Receives Data Reset where the DFP is the Vconn Source
Table 817 Steps for a DFP Receiving a Data Reset where the DFP is the Vconn Source
405 Figure 818 DFP Initiated Data Reset where the UFP is the Vconn Source
406 Table 818 Steps for a DFP Initiated Data Reset where the UFP is the Vconn Source
409 Figure 819 DFP Receives a Data Reset where the UFP is the Vconn Source
410 Table 819 Steps for a DFP Receiving a Data Reset where the UFP is the Vconn Source
413 Figure 820 Source initiated Hard Reset
414 Table 820 Steps for Source initiated Hard Reset
416 Figure 821 Sink Initiated Hard Reset
417 Table 821 Steps for Sink initiated Hard Reset
419 Figure 822 Source initiated reset – Sink long reset
Table 822 Steps for Source initiated Hard Reset – Sink long reset
423 Figure 823 Successful Power Role Swap Sequence Initiated by the Source
424 Table 823 Steps for a Successful Source Initiated Power Role Swap Sequence
428 Figure 824 Successful Power Role Swap Sequence Initiated by the Sink
429 Table 824 Steps for a Successful Sink Initiated Power Role Swap Sequence
433 Figure 825 Successful Fast Role Swap Sequence
434 Table 825 Steps for a Successful Fast Role Swap Sequence
437 Figure 826 Data Role Swap, UFP operating as Sink initiates
Table 826 Steps for Data Role Swap, UFP operating as Sink initiates
439 Figure 827 Data Role Swap, UFP operating as Source initiates
Table 827 Steps for Data Role Swap, UFP operating as Source initiates
441 Figure 828 Data Role Swap, DFP operating as Source initiates
Table 828 Steps for Data Role Swap, DFP operating as Source initiates
443 Figure 829 Data Role Swap, DFP operating as Sink initiates
Table 829 Steps for Data Role Swap, DFP operating as Sink initiates
445 Figure 830 Source to Sink Vconn Source Swap
446 Table 830 Steps for Source to Sink Vconn Source Swap
448 Figure 831 Sink to Source Vconn Source Swap
449 Table 831 Steps for Sink to Source Vconn Source Swap
451 Figure 832 Source Alert to Sink
452 Table 832 Steps for Source Alert to Sink
453 Figure 833 Sink Alert to Source
Table 833 Steps for Sink Alert to Source
454 Figure 834 Sink Gets Source Status
Table 834 Steps for a Sink getting Source Status Sequence
456 Figure 835 Source Gets Sink Status
Table 835 Steps for a Source getting Sink Status Sequence
458 Figure 836 Sink Gets Source PPS Status
Table 836 Steps for a Sink getting Source PPS status Sequence
460 Figure 837 Sink Gets Source’s Capabilities
Table 837 Steps for a Sink getting Source Capabilities Sequence
462 Figure 838 Dual-Role Source Gets Dual-Role Sink’s Capabilities as a Source
Table 838 Steps for a Dual-Role Source getting Dual-Role Sink’s capabilities as a Source Sequence
464 Figure 839 Source Gets Sink’s Capabilities
Table 839 Steps for a Source getting Sink Capabilities Sequence
466 Figure 840 Dual-Role Sink Gets Dual-Role Source’s Capabilities as a Sink
Table 840 Steps for a Dual-Role Sink getting Dual-Role Source capabilities as a Sink Sequence
468 Figure 841 Sink Gets Source’s Extended Capabilities
Table 841 Steps for a Sink getting Source extended capabilities Sequence
470 Figure 842 Dual-Role Source Gets Dual-Role Sink’s Extended Capabilities
Table 842 Steps for a Dual-Role Source getting Dual-Role Sink extended capabilities Sequence
472 Figure 843 Sink Gets Source’s Battery Capabilities
Table 843 Steps for a Sink getting Source Battery capabilities Sequence
474 Figure 844 Source Gets Sink’s Battery Capabilities
Table 844 Steps for a Source getting Sink Battery capabilities Sequence
476 Figure 845 Sink Gets Source’s Battery Status
Table 845 Steps for a Sink getting Source Battery status Sequence
478 Figure 846 Source Gets Sink’s Battery Status
Table 846 Steps for a Source getting Sink Battery status Sequence
480 Figure 847 Source Gets Sink’s Port Manufacturer Information
Table 847 Steps for a Source getting Sink’s Port Manufacturer Information Sequence
482 Figure 848 Sink Gets Source’s Port Manufacturer Information
Table 848 Steps for a Source getting Sink’s Port Manufacturer Information Sequence
484 Figure 849 Source Gets Sink’s Battery Manufacturer Information
Table 849 Steps for a Source getting Sink’s Battery Manufacturer Information Sequence
486 Figure 850 Sink Gets Source’s Battery Manufacturer Information
Table 850 Steps for a Source getting Sink’s Battery Manufacturer Information Sequence
488 Figure 851 Vconn Source Gets Cable Plug’s Manufacturer Information
Table 851 Steps for a Vconn Source getting Sink’s Port Manufacturer Information Sequence
490 Figure 852 Source Gets Sink’s Country Codes
Table 852 Steps for a Source getting Country Codes Sequence
492 Figure 853 Sink Gets Source’s Country Codes
Table 853 Steps for a Source getting Sink’s Country Codes Sequence
494 Figure 854 Vconn Source Gets Cable Plug’s Country Codes
Table 854 Steps for a Vconn Source getting Sink’s Country Codes Sequence
496 Figure 855 Source Gets Sink’s Country Information
Table 855 Steps for a Source getting Country Information Sequence
498 Figure 856 Sink Gets Source’s Country Information
Table 856 Steps for a Source getting Sink’s Country Information Sequence
500 Figure 857 Vconn Source Gets Cable Plug’s Country Information
Table 857 Steps for a Vconn Source getting Sink’s Country Information Sequence
502 Figure 858 Source requests security exchange with Sink
Table 858 Steps for a Source requesting a security exchange with a Sink Sequence
504 Figure 859 Sink requests security exchange with Source
Table 859 Steps for a Sink requesting a security exchange with a Source Sequence
506 Figure 860 Vconn Source requests security exchange with Cable Plug
Table 860 Steps for a Vconn Source requesting a security exchange with a Cable Plug Sequence
508 Figure 861 Source requests firmware update exchange with Sink
Table 861 Steps for a Source requesting a firmware update exchange with a Sink Sequence
510 Figure 862 Sink requests firmware update exchange with Source
Table 862 Steps for a Sink requesting a firmware update exchange with a Source Sequence
512 Figure 863 Vconn Source requests firmware update exchange with Cable Plug
Table 863 Steps for a Vconn Source requesting a firmware update exchange with a Cable Plug Sequence
514 Figure 864 DFP to UFP Discover Identity
Table 864 Steps for DFP to UFP Discover Identity
516 Figure 865 Source Port to Cable Plug Discover Identity
Table 865 Steps for Source Port to Cable Plug Discover Identity
518 Figure 866 DFP to Cable Plug Discover Identity
Table 866 Steps for DFP to Cable Plug Discover Identity
520 Figure 867 DFP to UFP Enter Mode
Table 867 Steps for DFP to UFP Enter Mode
522 Figure 868 DFP to UFP Exit Mode
Table 868 Steps for DFP to UFP Exit Mode
524 Figure 869 DFP to Cable Plug Enter Mode
Table 869 Steps for DFP to Cable Plug Enter Mode
526 Figure 870 DFP to Cable Plug Exit Mode
Table 870 Steps for DFP to Cable Plug Exit Mode
528 Figure 871 UFP to DFP Attention
Table 871 Steps for UFP to DFP Attention
529 Figure 872 BIST Carrier Mode Test
530 Table 872 Steps for BIST Carrier Mode Test
531 Figure 873 BIST Test Data Test
532 Table 873 Steps for BIST Test Data Test
534 Figure 874 UFP Entering USB4 Mode (Valid)
Table 874 Steps for UFP USB4 Mode Entry (Valid)
536 Figure 875 Cable Plug Entering USB4 Mode (Valid)
Table 875 Steps for Cable Plug USB4 Mode Entry (Valid)
538 Figure 876 UFP Entering USB4 Mode (Invalid)
Table 876 Steps for UFP USB4 Mode Entry (Invalid)
540 Figure 877 Cable Plug Entering USB4 Mode (Invalid)
Table 877 Steps for Cable Plug USB4 Mode Entry (Invalid)
542 Figure 878 Unstructured VDM Message Sequence
Table 878 Steps for Unstructured VDM Message Sequence
544 Figure 879 Unstructured VDEM Message Sequence
Table 879 Steps for Unstructured VDEM Message Sequence
545 8.3.3 State Diagrams
Figure 880 Outline of States
546 Figure 881 References to states
Figure 882 Example of state reference with conditions
Figure 883 Example of state reference with the same entry and exit
548 Figure 884 Source Port Policy Engine State Diagram
556 Figure 885 Sink Port State Diagram
561 Figure 886 Source Port Soft Reset and Protocol Error State Diagram
563 Figure 887 Sink Port Soft Reset and Protocol Error Diagram
565 Figure 888 DFP Data_Reset Message State Diagram
567 Figure 889 UFP Data_Reset Message State Diagram
569 Figure 890 Source Port Not Supported Message State Diagram
570 Figure 891 Sink Port Not Supported Message State Diagram
571 Figure 892 Source Port Ping State Diagram
Figure 893 Source Port Source Alert State Diagram
Figure 894 Sink Port Source Alert State Diagram
572 Figure 895 Sink Port Sink Alert State Diagram
Figure 896 Source Port Sink Alert State Diagram
573 Figure 897 Sink Port Get Source Capabilities Extended State Diagram
Figure 898 Source Give Source Capabilities Extended State Diagram
574 Figure 899 Sink Port Get Source Status State Diagram
Figure 8100 Source Give Source Status State Diagram
575 Figure 8101 Source Port Get Sink Status State Diagram
Figure 8102 Sink Give Sink Status State Diagram
576 Figure 8103 Sink Port Get Source PPS Status State Diagram
Figure 8104 Source Give Source PPS Status State Diagram
577 Figure 8105 Get Battery Capabilities State Diagram
Figure 8106 Give Battery Capabilities State Diagram
578 Figure 8107 Get Battery Status State Diagram
Figure 8108 Give Battery Status State Diagram
579 Figure 8109 Get Manufacturer Information State Diagram
Figure 8110 Give Manufacturer Information State Diagram
580 Figure 8111 Get Country Codes State Diagram
Figure 8112 Give Country Codes State Diagram
581 Figure 8113 Get Country Information State Diagram
Figure 8114 Give Country Information State Diagram
582 Figure 8115 DFP Enter_USB Message State Diagram
Figure 8116 UFP Enter_USB Message State Diagram
583 Figure 8117 Send security request State Diagram
Figure 8118 Send security response State Diagram
584 Figure 8119 Security response received State Diagram
Figure 8120 Send firmware update request State Diagram
585 Figure 8121 Send firmware update response State Diagram
Figure 8122 Firmware update response received State Diagram
586 Figure 8123: DFP to UFP Data Role Swap State Diagram
588 Figure 8124: UFP to DFP Data Role Swap State Diagram
590 Figure 8125: Dual-Role Port in Source to Sink Power Role Swap State Diagram
593 Figure 8126: Dual-role Port in Sink to Source Power Role Swap State Diagram
596 Figure 8127: Dual-Role Port in Source to Sink Fast Role Swap State Diagram
598 Figure 8128: Dual-role Port in Sink to Source Fast Role Swap State Diagram
600 Figure 8129 Dual-Role (Source) Get Source Capabilities diagram
601 Figure 8130 Dual-Role (Source) Give Sink Capabilities diagram
Figure 8131 Dual-Role (Sink) Get Sink Capabilities State Diagram
602 Figure 8132 Dual-Role (Sink) Give Source Capabilities State Diagram
603 Figure 8133 Dual-Role (Source) Get Source Capabilities Extended State Diagram
Figure 8134 Dual-Role (Source) Give Sink Capabilities diagram
604 Figure 8135 Vconn Swap State Diagram
607 Figure 8136 Initiator to Port VDM Discover Identity State Diagram
608 Figure 8137 Initiator VDM Discover SVIDs State Diagram
609 Figure 8138 Initiator VDM Discover Modes State Diagram
610 Figure 8139 Initiator VDM Attention State Diagram
611 Figure 8140 Responder Structured VDM Discover Identity State Diagram
612 Figure 8141 Responder Structured VDM Discover SVIDs State Diagram
613 Figure 8142 Responder Structured VDM Discover Modes State Diagram
614 Figure 8143 Receiving a Structured VDM Attention State Diagram
Figure 8144 DFP VDM Mode Entry State Diagram
616 Figure 8145 DFP VDM Mode Exit State Diagram
617 Figure 8146 UFP Structured VDM Enter Mode State Diagram
618 Figure 8147 UFP Structured VDM Exit Mode State Diagram
619 Figure 8148 Cable Ready VDM State Diagram
Figure 8149 Cable Plug Soft Reset State Diagram
620 Figure 8150 Cable Plug Hard Reset State Diagram
621 Figure 8151 DFP/Vconn Source Soft Reset or Cable Reset of a Cable Plug or VPD State Diagram
622 Figure 8152 UFP/Vconn Source Soft Reset of a Cable Plug or VPD State Diagram
623 Figure 8153 Source Startup Structured VDM Discover Identity State Diagram
625 Figure 8154 Cable Plug Structured VDM Enter Mode State Diagram
626 Figure 8155 Cable Plug Structured VDM Exit Mode State Diagram
627 Figure 8156 Source EPR Mode Entry State Diagram
629 Figure 8157 Sink EPR Mode Entry State Diagram
630 Figure 8158 Source EPR Mode Exit State Diagram
631 Figure 8159 Sink EPR Mode Exit State Diagram
632 Figure 8160 BIST Carrier Mode State Diagram
633 Table 880 Policy Engine States
639 9 States and Status Reporting
9.1 Overview
640 Figure 91 Example PD Topology
641 9.1.1 PDUSB Device and Hub Requirements
9.1.2 Mapping to USB Device States
Figure 92 Mapping of PD Topology to USB
642 Figure 93 USB Attached to USB Powered State Transition
643 Figure 94 Any USB State to USB Attached State Transition (When operating as a Consumer)
Figure 95 Any USB State to USB Attached State Transition (When operating as a Provider)
644 9.1.3 PD Software Stack
9.1.4 PDUSB Device Enumeration
Figure 96 Any USB State to USB Attached State Transition (After a USB Type-C Data Role Swap)
Figure 97 Software stack on a PD aware OS
645 Figure 98 Enumeration of a PDUSB Device
646 9.2 PD Specific Descriptors
9.2.1 USB Power Delivery Capability Descriptor
Table 91 USB Power Delivery Type Codes
Table 92 USB Power Delivery Capability Descriptor
647 9.2.2 Battery Info Capability Descriptor
Table 93 Battery Info Capability Descriptor
648 9.2.3 PD Consumer Port Capability Descriptor
9.2.4 PD Provider Port Capability Descriptor
Table 94 PD Consumer Port Descriptor
649 9.3 PD Specific Requests and Events
9.3.1 PD Specific Requests
Table 95 PD Provider Port Descriptor
Table 96 PD Requests
Table 97 PD Request Codes
650 9.4 PDUSB Hub and PDUSB Peripheral Device Requests
9.4.1 GetBatteryStatus
Table 98 PD Feature Selectors
Table 99 Battery Status Structure
651 9.4.2 SetPDFeature
652 Table 910 Battery Wake Mask
Table 911 Charging Policy Encoding
653 10 Power Rules
10.1 Introduction
10.2 Source Power Rules
10.2.1 Source Power Rule Considerations
Table 101 Considerations for Sources
654 10.2.2 Normative Voltages and Currents
Table 102 SPR Normative Voltages and Minimum Currents
655 Figure 101 SPR Source Power Rule Illustration
Figure 102 SPR Source Power Rule Example
656 Table 103 Fixed Supply PDO – Source 5V
Table 104 Fixed Supply PDO – Source 9V
Table 105 Fixed Supply PDO – Source 15V
Table 106 Fixed Supply PDO – Source 20V
657 10.2.3 Optional Voltages/Currents
Table 107 SPR Programmable Power Supply PDOs and APDOs based on the PDP
658 Table 108 SPR Programmable Power Supply Voltage Ranges
660 Table 109 EPR Source Capabilities based in the Port’s PDP
661 Table 1010 EPR Source Capabilities based on a Shared Port’s Equivalent PDP
662 Figure 103 Valid EPR AVS Operating Region
Table 1011 EPR Source Equivalent PDP Examples
663 10.2.4 Power sharing between ports
10.3 Sink Power Rules
10.3.1 Sink Power Rule Considerations
10.3.2 Normative Sink Rules
Table 1012 EPR Adjustable Voltage Supply (AVS) Voltage Ranges
664 A. CRC calculation
A.1 C code example
666 A.2 Table showing the full calculation over one Message
667 B. PD Message Sequence Examples
B.1 External power is supplied downstream
Figure B1 External Power supplied downstream
668 Table B1 External power is supplied downstream
670 B.2 External power is supplied upstream
671 Figure B2 External Power supplied upstream
Table B2 External power is supplied upstream
677 B.3 Giving back power
Figure B3 Giving Back Power
Table B3 Giving back power.
687 C. VDM Command Examples
C.1 Discover Identity Example
C.1.1 Discover Identity Command request
C.1.2 Discover Identity Command response – Active Cable.
Table C1 Discover Identity Command request from Initiator Example.
688 Table C2 Discover Identity Command response from Active Cable Responder Example
689 C.1.3 Discover Identity Command response – Hub.
Table C3 Discover Identity Command response from Hub Responder Example
690 C.2 Discover SVIDs Example
C.2.1 Discover SVIDs Command request
C.2.2 Discover SVIDs Command response
Table C4 Discover SVIDs Command request from Initiator Example.
Table C5 Discover SVIDs Command response from Responder Example.
692 C.3 Discover Modes Example
C.3.1 Discover Modes Command request
C.3.2 Discover Modes Command response
Table C6 Discover Modes Command request from Initiator Example.
Table C7 Discover Modes Command response from Responder Example.
694 C.4 Enter Mode Example
C.4.1 Enter Mode Command request
C.4.2 Enter Mode Command response
Table C8 Enter Mode Command request from Initiator Example.
Table C9 Enter Mode Command response from Responder Example.
695 C.4.3 Enter Mode Command request with additional VDO.
Table C10 Enter Mode Command request from Initiator Example.
696 C.5 Exit Mode Example
C.5.1 Exit Mode Command request
C.5.2 Exit Mode Command response
Table C11 Exit Mode Command request from Initiator Example.
Table C12 Exit Mode Command response from Responder Example.
697 C.6 Attention Example
C.6.1 Attention Command request
C.6.2 Attention Command request with additional VDO.
Table C13 Attention Command request from Initiator Example
698 D. BMC Receiver Design Examples
D.1 Finite Difference Scheme
D.1.1 Sample Circuitry
D.1.2 Theory
Figure D1 Circuit Block of BMC Finite Difference Receiver
Table C14 Attention Command request from Initiator with additional VDO Example
699 Figure D2 BMC AC and DC noise from VBUS at Power Sink
700 Figure D3 Sample BMC Signals (a) without [USB 2.0] SE0 Noise (b) with [USB 2.0] SE0 Noise
Figure D4 Scaled BMC Signal Derivative with 50ns Sampling Rate.
701 D.1.3 Data Recovery
D.1.4 Noise Zone and Detection Zone
Figure D5 BMC Signal and Finite Difference Output with Various Time Steps
Figure D6 Output of Finite Difference in dash line and Edge Detector in solid line
702 D.2 Subtraction Scheme
D.2.1 Sample Circuitry
D.2.2 Output of Each Circuit Block
Figure D7 Noise Zone and Detect Zone of BMC Receiver
Figure D8 Circuit Block of BMC Subtraction Receiver
703 D.2.3 Subtractor Output at Power Source and Power Sink
Figure D9 (a) Output of LPF1 and LPF2 (b) Subtraction of LPF1 and LPF2 Output
Figure D10 Output of the BMC LPF1 in blue dash curve and the Subtractor in red solid curve
704 D.2.4 Noise Zone and Detection Zone
E. FRS System Level Example
E.1 Overview
Figure E1 Example FRS Capable System
705 Figure E2 Slow VBUS Discharge
706 E.2 FRS Initial Setup
Figure E3 Fast VBUS Discharge
Table E1: Sequence Table for setup of a Fast Role Swap (Hub connected to Power Adapter first)
707 Table E2 Sequence Table for setup of a Fast Role Swap (Hub connected to Notebook before Power Adapter)
708 E.3 FRS Process
709 Figure E4 Sequence Diagram for slow Vbus discharge (it discharges after FR_Swap message is sent)
Table E3 Sequence Table for slow Vbus discharge (it discharges after FR_Swap message is sent)
710 Figure E-5: Sequence for Vbus discharges quickly (before FR_Swap message is sent) after adapter disconnected.
711 Table E4 Vbus discharges quickly after adapter disconnected.

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