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BS EN IEC 62566-2:2020

BS EN IEC 62566-2:2020

$198.66

Nuclear power plants. Instrumentation and control systems important to safety. Development of HDL-programmed integrated circuits – HDL-programmed integrated circuits for systems performing category B or C functions

Published By Publication Date Number of Pages
BSI 2020 64
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This part of IEC 62566 provides requirements for achieving highly reliable HDL-Programmed Devices (HPDs), for use in I&C systems of nuclear power plants performing functions of safety category B or C as defined by IEC 61226.

The programming of HPDs relies on Hardware Description Languages (HDL) and related software tools. They are typically based on blank Field Programmable Gate Arrays (FPGAs) or similar micro-electronic technologies such as Programmable Logic Devices (PLD), Complex Programmable Logic Devices (CPLDs), etc. General purpose integrated circuits such as microprocessors are not HPDs. Annex B.8 provides descriptions of a number of different types of integrated circuits.

This document provides requirements on:

  1. a dedicated HPD life-cycle addressing each phase of the development of HPDs, including specification of requirements, design, implementation, integration and validation, as well as verification activities associated with each phase,

  2. planning and complementary activities such as modification and production,

  3. selection of pre-developed components. This includes micro-electronic technologies and Pre-Developed Blocks (PDBs),

  4. tools used to design, implement and verify HPDs.

This document does not put requirements on the development of the micro-electronic technologies, which are usually available as “commercial off-the-shelf” items and are not developed under nuclear quality assurance standards. It addresses the developments made with these micro-electronic technologies in an I&C project with HDLs and related tools.

This document provides guidance to avoid as far as possible latent faults remaining in HPDs, and to reduce the susceptibility to single failures as well as to potential Common Cause Failures (CCFs).

Reliability aspects related to environmental qualification and failures due to ageing or physical degradation are not handled in this document. Other standards, especially IEC 60987, IEC/IEEE 60780-323 and IEC 62342, address these topics.

This document does not cover cybersecurity for HDL aspects of I&C systems. IEC 62645 provides requirements for security programmes for I&C programmable digital systems.

This document provides guidance and requirements to produce verifiable HPD designs and implementations requiring justification due for their role in carrying out category B or C safety functions. This document describes the activities to develop HPDs, organized in the framework of a dedicated life-cycle. It also describes activities and guidelines to be used in addition to the requirements of IEC 61226 for system classification and IEC 61513 for system integration and validation when HPDs are included.

PDF Catalog

PDF Pages PDF Title
2 undefined
5 Annex ZA (normative)Normative references to international publicationswith their corresponding European publications
7 English
CONTENTS
10 FOREWORD
12 INTRODUCTION
15 1 Scope
16 2 Normative references
3 Terms and definitions
23 4 Symbols and abbreviated terms
24 5 General requirements for HPD projects
5.1 General
5.2 Life-cycle
25 Figures
Figure 1 ā€“ System life-cycle (informative, as defined by IEC 61513)
26 5.3 Gradation principles
Figure 2 ā€“ HPD life-cycle
27 5.4 HPD quality assurance
5.4.1 General
28 5.5 Configuration management
5.5.1 General
5.6 HPD Verification
29 6 HPD requirements specification
6.1 General
6.1.1 Overview
30 6.2 Functional aspects of the requirements specification
6.2.1 General
31 6.3 Fault detection and fault tolerance
6.4 Requirements capture using Electronic System Level tools
6.4.1 General
32 6.4.2 Requirements on the formalism of tools used at ESL level
6.4.3 Interface with design tools
7 Acceptance process for programmable integrated circuits, native blocks and Pre-Developed Blocks
7.1 General
7.2 Acceptance process for programmable integrated circuits and included native blocks
7.2.1 General
33 7.2.2 Integrated Circuit acceptance
Figure 3 ā€“ Overview of selection and acceptance processfor blank Integrated Circuits and native blocks
34 7.3 Acceptance process for PDBs
7.3.1 General
7.3.2 PDB functional suitability
Figure 4 ā€“ Overview of selection and acceptance process for PDBs
35 7.3.3 Documentation for safety of PDBs
7.3.4 Generation of supporting documentation for safety
37 7.3.5 Complementary means
7.3.6 Rules of use
38 7.3.7 Modification for acceptance
8 HPD design and implementation
8.1 General
8.2 Hardware Description Languages (HDL) and related tools
8.2.1 General
8.3 Design
8.3.1 General
40 8.3.2 Fault detection
8.3.3 Language and coding rules
41 8.3.4 Synchronous vs. asynchronous design
42 8.3.5 Power Management
8.3.6 Design documentation
8.4 Implementation
8.4.1 Products
8.4.2 Files of parameters and constraints
8.4.3 Post-route analyses
43 8.4.4 Redundancies introduced or removed by the tools
8.4.5 Finite state machines
8.4.6 Static Timing Analysis
8.4.7 Implementation documentation
44 8.5 System level tools and automated code generation
8.5.1 General
9 HPD integration and testing
9.1 General
45 9.2 Test-benches for HPD functional simulation
9.3 Test coverage
46 9.4 Test execution
10 HPD aspects of system integration
10.1 General
10.2 Requirements
47 11 HPD aspects of system validation
11.1 General
11.2 Requirements
48 12 Modification
12.1 Modification of the requirements, design or implementation
12.1.1 General
50 12.2 Modification of the micro-electronic technology
13 HPD production
13.1 General
13.2 Production tests
13.3 Programming files and programming activities
51 14 HPD aspects of installation, commissioning and operation
14.1 General
14.1.1 Overview
14.2 Anomaly reports
15 Software tools for the development of HPDs
15.1 General
15.1.1 Overview
52 15.2 Additional requirements for design, implementation and simulation tools
53 16 Design segmentation or partitioning
16.1 Background
16.2 Auxiliary or support functions
16.2.1 General
16.2.2 Partitioning of auxiliary or support functions or functions of an inferior safety category
54 17 Defences against HPD Common Cause Failure
55 Annex A (informative)Documentation
A.1 General
A.2 Project
A.3 HPD requirement specification
A.4 Acceptance of blank integrated circuits, Native Blocks and PDBs
A.5 HPD design and implementation
56 A.6 HPD integration and testing
A.7 HPD aspects of system integration
A.8 HPD aspects of system validation
A.9 Modification
A.10 HPD production
A.11 Software tools for the development of HPDs
57 Annex B (informative)Development of HPDs
B.1 General
B.2 Optional capture of requirements at Electronic System Level
B.3 HPD and system life-cycle
58 B.4 Design
59 B.5 Acceptance process for programmable integrated circuits, native blocks and Pre-Developed Blocks
B.6 Implementation
60 B.7 HPD integration and testing
B.8 Types of specific integrated circuits
B.8.1 General
61 B.8.2 PAL (Programmable Array Logic)
B.8.3 PLD, CPLD (Programmable Logic Device, Complex PLD)
B.8.4 FPGA
62 B.8.5 Gate Array, or pre-diffused integrated circuit
B.8.6 Standard Cells
B.8.7 ā€œFull custom ASICā€, or ā€œraw ASICā€
63 Bibliography

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BS EN IEC 62566-2:2020
$198.66