IPC 9641:2013
$27.95
High Temperature Printed Board Flatness Guideline
Published By | Publication Date | Number of Pages |
IPC | 2013-06-01 | 30 |
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Printed board flatness is largely affected by a change in intrinsic properties through exposure to variances in temperature. The worst case deviation of the printed board from flatness may be at room temperature, peak temperature during reflow, or at any temperature in between. Printed board flatness must therefore be characterized during the entire reflow thermal cycle, and not solely at room temperature at the beginning and end of the assembly process. This document aims to provide guidance on methods and procedures for critically evaluating the relative change in shape (printed board flatness) of local areas of interest (e.g., BGA land area) during a simulated temperature reflow cycle.
Published Code | IPC |
---|---|
Published By | IPC International Inc, formerly Institute for Printed Circuits |
Publication Date | 2013-06-01 |
Pages Count | 30 |
Language | English |
File Size | 5.2 MB |
ISBN | 978-1-61193-093-1 |
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